Multi-chip packaged integrated circuit with flash memory and slave memory controller
A multi-chip packaged integrated circuit part for mounting to a printed circuit board of a memory module. The multi-chip packaged integrated circuit part comprises an integrated circuit package including a slave memory controller (SMC) die; and pairs of a spacer under the slave memory controller die, and a flash memory die under the spacer. In each pair, the flash memory die may be larger than the spacer so that an opening is provided into a perimeter of the flash memory die to allow electrical connections to be made. A plurality of conductors may be used to electrically couple the slave memory controller die and the flash memory die to one or more pads of a pin-out of the integrated circuit package.
1. A multi-chip packaged integrated circuit part to mount to a printed circuit board of a memory module, the multi-chip packaged integrated circuit part comprising:
an integrated circuit package including
a slave memory controller (SMC) die;
one or more pairs of
a spacer under the slave memory controller die, and
a flash memory die under the spacer,
wherein the flash memory die is larger than the spacer to provide an opening into a perimeter of the flash memory die to which electrical connections may be made;
a first plurality of conductors electrically coupling the slave memory controller die to one or more independent pads of a pin-out of the integrated circuit package;
a second plurality of conductors electrically coupling the slave memory controller die to one or more joint pads of the pin-out; and
a third plurality of conductors electrically coupling one or more of the flash memory die to the one or more joint pads of the pin-out to electrically couple the flash memory die to the slave memory control die.
2. The multi-chip packaged integrated circuit part of claim 1 , wherein
the integrated circuit package is a multi-chip module integrated circuit package.
3. The multi-chip packaged integrated circuit part of claim 1 , wherein
each of the spacers is a dielectric or insulator so active portions of the circuitry of the flash memory die do not short to active portions of a neighboring integrated circuit die.
4. A multi-chip packaged integrated circuit part to mount to a printed circuit board of a memory module, the multi-chip packaged integrated circuit part comprising:
an integrated circuit package including
a slave memory controller die including a processor; and
one or more pairs of
a spacer under the slave memory controller die, and
a flash memory die under the spacer,
wherein the flash memory die is larger than the spacer to provide an opening into a perimeter of the flash memory die to which electrical connections may be made.
5. The multi-chip packaged integrated circuit part of claim 4 , wherein
the slave memory controller die further includes a scratch pad memory coupled to the processor.
6. A multi-chip packaged integrated circuit part to mount to a printed circuit board of a memory module, the multi-chip packaged integrated circuit part comprising:
an integrated circuit part including
a slave memory controller (SMC) die;
a first spacer under the slave memory controller die;
a processor die under the first spacer;
a second spacer under the processor;
a scratch pad memory die under the second spacer; and
under the scratch pad memory die, one or more pairs of
a third spacer under the scratch pad memory die, and
a flash memory die under the third spacer.
7. The multi-chip packaged integrated circuit part of claim 6 , further comprising:
a first plurality of conductors to electrically coupled the slave memory controller die to one or more independent pads of a pin-out of the integrated circuit package;
a second plurality of conductors to electrically couple the slave memory controller die to one or more joint pads of the pin-out; and
a third plurality of conductors to electrically couple one or more of the flash memory die to the one or more joint pads of the pin-out to electrically couple the flash memory die to the slave memory control die.
8. The multi-chip packaged integrated circuit part of claim 6 , wherein
each of the spacers is a dielectric or insulator so active portions of the circuitry of the flash memory die do not short to active portions of a neighboring integrated circuit die.
9. The multi-chip packaged integrated circuit part of claim 6 , wherein
the integrated circuit package is a multi-chip module integrated circuit package.
10. The multi-chip packaged integrated circuit part of claim 6 , wherein
the scratch pad memory die is coupled to the processor die.
11. The multi-chip packaged integrated circuit part of claim 4 , wherein
the integrated circuit package is a multi-chip module integrated circuit package.
12. The multi-chip packaged integrated circuit part of claim 4 , further comprising:
a first plurality of conductors to electrically coupled the slave memory controller die to one or more independent pads of a pin-out of the integrated circuit package;
a second plurality of conductors to electrically couple the slave memory controller die to one or more joint pads of the pin-out; and
a third plurality of conductors to electrically couple one or more of the flash memory die to the one or more joint pads of the pin-out to electrically couple the flash memory die to the slave memory control die.
13. The multi-chip packaged integrated circuit part of claim 4 , wherein
each of the spacers is a dielectric or insulator so active portions of the circuitry of the flash memory die do not short to active portions of a neighboring integrated circuit die.