IP Library Granted Patent US 9,921,896
Granted Patent B2
US 9,921,896 · App. 14/177,219 · Granted Mar 20, 2018

Shutdowns and data recovery to avoid read errors weak pages in a non-volatile memory system

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Quick Facts
Patent No.
US 9,921,896
App. No.
14/177,219
Granted
Mar 20, 2018
Kind
B2
Abstract

A memory apparatus and methods are provided for preventing read errors on weak pages in a non-volatile memory system. In one example, a method includes identifying a weak page in a non-volatile memory device along a word line, wherein the weak page is partially written with at least some data; buffering data associated with the weak page to a weak page buffer that is coupled in communication with the non-volatile memory device; determining that an amount of data in the weak page buffer has reached a predetermined data level; and writing the data from the weak page buffer into the weak page along the word line in the non-volatile memory device.

Claims (69)

1. A method to perform a planned shutdown of a non-volatile memory system, the method comprising:

receiving a request to perform a planned shutdown of the non-volatile memory system to conserve power within a storage area network;

before performing the planned shutdown, determining if a currently written page in a word line is a weak page;

proceeding with the planned shutdown;

determining the currently written page is a weak page; and

performing stabilization writes to subsequent vacant pages, not including the weak page, in the word line until the currently written page is stabilized and then proceeding with the planned shutdown.

2. The method of claim 1 , wherein performing the stabilization writes comprises:

generating filler data to perform the stabilization writes into the weak page, and

performing page write operations to write filler data into vacant pages along a single word line or one or more word lines near the single word line until the weak page is stable.

3. The method of claim 2 , wherein the filler data includes random one and zero bits.

4. A method to perform a planned shutdown of a non-volatile memory system, the method comprising:

receiving a request to perform a planned shutdown of the non-volatile memory system to conserve power within a storage area network;

before performing the planned shutdown, determining if a currently written page in a word line is a weak page;

proceeding with the planned shutdown;

determining the currently written page is a weak page; and

performing stabilization writes to subsequent vacant pages, not including the weak page, in the word line and one or more next word lines in write order until the currently written page is stabilized and then proceeding with the planned shutdown.

5. The method of claim 4 , wherein determining if the currently written page is a weak page comprises:

reading a current page that is written to the non-volatile memory device;

determining that a number of bit errors associated with the current page is above a predetermined error level; and

assigning a weak page status to the current page.

6. The method of claim 5 , wherein the predetermined error level is between two and six bit errors per read from a write page, including at least one of:

six bit errors per read from an upper even write page;

four bit errors per read from an upper odd write page;

two bit errors per read from a lower even write page; or

two bit errors per read from a lower odd write page.

7. A method to perform data recovery of a non-volatile memory system upon power up, the method comprising:

determining that an unplanned shutdown of the non-volatile memory system occurred;

identifying a last written segment on a non-volatile memory device that was written prior to the unplanned shutdown;

reading marker bytes on each page of the last written segment to identify a last written page that was written prior to the unplanned shutdown;

determining that the last written page that was written prior to the unplanned shutdown is a weak page; and

performing stabilization writes to one or more vacant pages, not including the weak page, along a word line that includes the last written page to stabilize data therein.

8. The method of claim 7 , further comprising:

performing stabilization writes to one or more vacant pages, not including the weak page, along adjacent word lines to stabilize the data stored in the last written page.

9. The method of claim 7 , further comprising:

in response to a read request, reading data out from the last written page after completion of the stabilization writes.

10. The method of claim 7 , wherein performing stabilization writes to the one or more vacant pages comprises:

generating filler data to perform the stabilization writes; and

generating page write operations to write the filler data into vacant pages along the word line until data in the last written page is stable.

11. The method of claim 10 , wherein performing stabilization writes to the one or more vacant pages further comprises:

generating page write operations to write filler data into vacant pages along one or more next word lines in write order.

12. A non-volatile memory system, comprising:

a memory controller coupled to a non-volatile memory device (NVMD), wherein the memory controller is capable of,

receiving a request to perform a planned shutdown of the non-volatile memory system to conserve power within a storage area network;

before performing the planned shutdown, determining if a currently written page in a word line is a weak page; and

proceeding with the planned shutdown, wherein before proceeding with the planned shutdown, the memory controller is further capable of:

determining the currently written page is a weak page; and

performing stabilization writes to subsequent vacant pages, not including the weak page, in the word line until the currently written page is stabilized and then proceeding with the planned shutdown.

13. The non-volatile memory system of claim 12 , wherein performing the stabilization writes comprises:

generating filler data to perform the stabilization writes into the weak page, and

performing page write operations to write filler data into vacant pages along a single word line or one or more word lines near the single word line until the weak page is stable.

14. The non-volatile memory system of claim 13 , wherein the filler data includes random one and zero bits.

15. A non-volatile memory system, comprising:

a memory controller coupled to a non-volatile memory device (NVMD), wherein the memory controller is capable of,

receiving a request to perform a planned shutdown of the non-volatile memory system to conserve power within a storage area network;

before performing the planned shutdown, determining if a currently written page in a word line is a weak page; and

proceeding with the planned shutdown, wherein the memory controller is further capable of:

determining the currently written page is a weak page; and

performing stabilization writes to subsequent vacant pages, not including the weak page, in the word line and one or more next word lines in write order until the currently written page is stabilized and then proceeding with the planned shutdown.

16. The non-volatile memory system of claim 15 , wherein determining if the currently written page is a weak page comprises:

reading a current page that is written to the non-volatile memory device;

determining that a number of bit errors associated with the current page is above a predetermined error level; and

assigning a weak page status to the current page.

17. The non-volatile memory system of claim 16 , wherein the predetermined error level is between two and six bit errors per read from a write page, including at least one of:

six bit errors per read from an upper even write page;

four bit errors per read from an upper odd write page;

two bit errors per read from a lower even write page; or

two bit errors per read from a lower odd write page.

18. The non-volatile memory system of claim 16 , wherein determining the number of bit errors comprises:

determining the number of bit errors associated with the current page is not within an error correction capability of an error-correcting code (ECC).

Assignments (15)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 053926 FRAME 0446 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0321 →
SECURITY INTEREST Recorded Sep 29, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 053926/0446 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 9, 2020
From: VIRIDENT SYSTEMS, LLC
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 053180/0472 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: HGST, INC.
Reel/Frame 045109/0871 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2016
From: NARASIMHA, ASHWIN; BATTAJE, AJITH KUMAR; PATALE, VIBHOR; SHARMA, SANDEEP
To: VIRIDENT SYSTEMS, LLC
Reel/Frame 040812/0392 →
SECURITY AGREEMENT Recorded May 16, 2016
From: HGST, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038708/0362 →
SECURITY AGREEMENT Recorded May 16, 2016
From: HGST, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038707/0819 →
SECURITY AGREEMENT Recorded May 13, 2016
From: HGST, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038701/0015 →