Read writeable randomly accessible non-volatile memory modules
View Patent ↗A read writeable random accessible non-volatile memory module includes a printed circuit board with an edge connector that can be plugged into a socket of a printed circuit board. The read writeable random accessible non-volatile memory modules further include a plurality of read writable non-volatile memory devices.
1. A non-volatile memory module comprising:
a memory module printed circuit board with a memory module edge connector to plug into a memory module socket;
a plurality of read writeable non-volatile memory integrated circuits coupled to the memory module printed circuit board, the plurality of read writeable non-volatile memory integrated circuits store data in a non-volatile manner;
a plurality of buffer integrated circuits coupled to and between the memory module edge connector and the plurality of read writeable non-volatile memory integrated circuits; and
a feedback status control signal line coupled to a memory controller to communicate a feedback status control signal with the memory controller,
wherein the plurality of buffer integrated circuits each include a many-to-one bus multiplexer to write data onto a data bus at the memory module edge connector, and a one-to-many bus demultiplexer to read data from the data bus at the memory module edge connector onto one of a plurality of data buses coupled to the read writeable non-volatile memory integrated circuits.
2. The non-volatile memory module of claim 1 , wherein the memory module edge connector is a dual inline memory module edge connector, and the memory module socket is a dual inline memory module socket.
3. The non-volatile memory module of claim 1 , wherein the memory module edge connector of the non-volatile memory module is plug-compatible with an edge connector of a dynamic random access memory module.
4. The non-volatile memory module of claim 1 , wherein the plurality of read writeable non-volatile memory integrated circuits are randomly read accessible and randomly write accessible.
5. The non-volatile memory module of claim 1 , wherein the feedback status control signal indicates whether or not a rank of memory in the non-volatile memory module is busy or ready for another access to alleviate the non-deterministic nature of erase and write operations to the non-volatile memory module.
6. The non-volatile memory module of claim 1 , wherein the feedback status control signal line is a plurality of feedback status control signal lines coupled to the memory controller to communicate a plurality of feedback status control signals with the memory controller.
7. The non-volatile memory module of claim 6 , wherein the plurality of feedback status control signals indicate whether or not portions of memory in the non-volatile module are busy or ready for another access to alleviate the non-deterministic nature of erase and write operations to the non-volatile memory module.
8. A non-volatile memory module comprising:
a memory module printed circuit board with a memory module edge connector to plug into a memory module socket;
a plurality of read writeable non-volatile memory integrated circuits coupled to the memory module printed circuit board, the plurality of read writeable non-volatile memory integrated circuits store data in a non-volatile manner;
a plurality of buffer integrated circuits coupled to and between the memory module edge connector and the plurality of read writeable non-volatile memory integrated circuits; and
a feedback status control signal line coupled to a memory controller to communicate a feedback status control signal with the memory controller,
wherein the plurality of buffer integrated circuits each include a cross-bar switch coupled between a plurality of data busses connected to the plurality of read writeable non-volatile memory integrated circuits and a data bus at the memory module edge connector, the cross bar switch to write data onto the data bus at the memory module edge connector from the plurality of read writeable non-volatile memory integrated circuits and to read data from the data bus at the memory module edge connector and couple the data onto one of data buses connected to the plurality of read writeable non-volatile memory integrated circuits.
9. The non-volatile memory module of claim 8 , wherein the memory module edge connector is a dual inline memory module edge connector, and the memory module socket is a dual inline memory module socket.
10. The non-volatile memory module of claim 8 , wherein the memory module edge connector of the non-volatile memory module is plug-compatible with an edge connector of a dynamic random access memory module.
11. The non-volatile memory module of claim 8 , wherein the plurality of read writeable non-volatile memory integrated circuits are randomly read accessible and randomly write accessible.
12. The non-volatile memory module of claim 8 , wherein the feedback status control signal indicates whether or not a rank of memory in the non-volatile memory module is busy or ready for another access to alleviate the non-deterministic nature of erase and write operations to the non-volatile memory module.
13. The non-volatile memory module of claim 8 , wherein the feedback status control signal line is a plurality of feedback status control signal lines coupled to the memory controller to communicate a plurality of feedback status control signals with the memory controller.
14. The non-volatile memory module of claim 8 , wherein the plurality of feedback status control signals indicate whether or not portions of memory in the non-volatile module are busy or ready for another access to alleviate the non-deterministic nature of erase and write operations to the non-volatile memory module.