IP Library › Granted Patent US 8,238,176
Granted Patent B2
US 8,238,176 · App. 12/833,744 · Granted Aug 7, 2012

I/O circuit with phase mixer for slew rate control

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 8,238,176
App. No.
12/833,744
Granted
Aug 7, 2012
Kind
B2
Abstract

An apparatus includes a terminal, a first plurality of driver lines, and a first phase mixer. The driver lines drive the terminal to a first logic state responsive to a first enable signal. The first phase mixer is coupled to a first one of the first plurality of driver lines. The first phase mixer is operable to receive the first enable signal and a first delayed enable signal derived from the first enable signal and generate a first signal on the first driver line having a first configurable delay with respect to the first enable signal by mixing the first enable signal and the first delayed enable signal.

Claims (44)

1. An apparatus, comprising:

a terminal; and

a pull-up path coupled to the terminal, the pull-up path including:

a plurality of pull-up driver lines for driving the terminal to a first logic state responsive to a pull-up enable signal;

a plurality of pull-up phase mixers coupled to at least a first subset of the pull-up driver lines, each pull-up phase mixer being operable to receive the pull-up enable signal and a delayed pull-up enable signal derived from the pull-up enable signal and generate a signal on the associated pull-up driver line having a first configurable delay with respect to the pull-up enable signal by mixing the pull-up enable signal and the delayed pull-up enable signal; and

a pull-down path coupled to the terminal, the pull-down path including:

a plurality of pull-down driver lines for driving the terminal to a first logic state responsive to a pull-down enable signal; and

a plurality of pull-down phase mixers coupled to at least a second subset of the pull-down driver lines, each pull-down phase mixer being operable to receive the pull-down enable signal and a delayed pull-down enable signal derived from the pull-down enable signal and generate a signal on the associated pull-down driver line having a second configurable delay with respect to the pull-down enable signal by mixing the pull-down enable signal and the delayed pull-down enable signal.

2. The apparatus of claim 1 , wherein each of the pull-up phase mixers is configurable based on a control word and includes a plurality of stages, each stage being responsive to a bit of the associated control word to select one of the pull-up enable signal or the delayed pull-up signal as an output of the stage, and the each pull-up phase mixer is configured to mix the outputs of the stages to generate the signal on the associated pull-up driver line.

3. The apparatus of claim 2 , wherein each of the pull-down phase mixers is configurable based on a control word and includes a plurality of stages, each stage being responsive to a bit of the associated control word to select one of the pull-down enable signal or the delayed pull-down signal as an output of the stage, and the each pull-down phase mixer is configured to mix the outputs of the stages to generate the signal on the associated pull-down driver line.

4. The apparatus of claim 1 , wherein an output of a first pull-up phase mixer in the plurality of pull-up phase mixers provides the delayed pull-up enable signal for a second pull-up phase mixer in the plurality of pull-up phase mixers and an output of the second pull-up phase mixer provides the delayed pull-up enable signal for the first pull-up phase mixer.

5. The apparatus of claim 1 , further comprising:

at least a first buffer coupled to a pull-up driver line not included in the first subset; and

first timing adjust circuitry coupled to the plurality of pull-up driver lines and operable to provide a first additional configurable delay on each of the pull-up driver lines, the first additional configurable delay having a resolution less than the first configurable delay.

6. The apparatus of claim 5 , further comprising:

at least a second buffer coupled to a pull-down driver line not included in the second subset; and

second timing adjust circuitry coupled to the plurality of pull-down driver lines and operable to provide a second additional configurable delay on each of the pull-down driver lines, the second additional configurable delay having a resolution less than the second configurable delay.

7. An apparatus, comprising:

a plurality of pull-up phase mixers coupled to a first subset of pull-up driver lines, at least one pull-up phase mixer being operable to receive a pull-up enable signal and a delayed pull-up enable signal based, at least in part, on the pull-up enable signal and generate a corresponding pull-up output signal on an associated pull-up driver line;

a plurality of pull-down phase mixers coupled to a second subset of pull-down driver lines, at least one pull-down phase mixer being operable to receive a pull-down enable signal and a delayed pull-down enable signal based, at least in part, on the pull-down enable signal and generate a corresponding pull-down output signal on an associated pull-down driver line;

a pull-up driver configured to drive a terminal to a first logic state responsive to receipt of the corresponding pull-up output signal on an associated pull-up driver line; and

a pull-down driver configured to drive the terminal to a second logic state responsive to receipt of the corresponding pull-down signal on an associated pull-up driver line.

8. The apparatus of claim 7 , wherein the at least one pull-up phase mixer is configurable based on a control word and includes a plurality of stages, each stage being responsive to a bit of the associated control word to select one of the pull-up enable signal or the delayed pull-up signal as an output of the stage, and the at least one pull-up phase mixer is configured to mix the outputs of the stages to generate the signal on the associated pull-up driver line.

9. The apparatus of claim 7 , wherein the at least one pull-down phase mixer is configurable based on a control word and includes a plurality of stages, each stage being responsive to a bit of the associated control word to select one of the pull-down enable signal or the delayed pull-down signal as an output of the stage, and the at least one pull-down phase mixer is configured to mix the outputs of the stages to generate the signal on the associated pull-down driver line.

10. The apparatus of claim 7 , wherein the corresponding pull-up output signal on the associated pull-up driver line is based, at least in part, on mixing the pull-up enable signal and the delayed pull-up enable signal.

11. The apparatus of claim 7 , wherein the corresponding pull-down output signal on the associated pull-down driver line is based, at least in part, on mixing the pull-down enable signal and the delayed pull-down enable signal.

12. The apparatus of claim 7 , wherein an output of a second pull-up phase mixer provides the delayed pull-up enable signal for the at least one pull-up phase mixer.

13. A method for mixing signals, comprising:

generating a pull-up enable signal and a pull-down enable signal;

generating at least one delayed pull-up enable signal and at least one delayed pull-down enable signal;

mixing the pull-up enable signal and the at least one delayed pull-up enable signal to generate a pull-up drive signal;

mixing the pull-down enable signal and the at least one delayed pull-down enable signal to generate a pull-down drive signal;

driving a terminal to a first logic state based, at least in part, on at least one of the pull-up drive signal and the pull-down drive signal.

14. The method of claim 13 , further comprising:

generating a buffered pull-up enable signal based, at least in part, on the pull-up enable signal.

15. The method of claim 13 , further comprising:

generating a buffered pull-down enable signal based, at least in part, on the pull-down enable signal.

16. The method of claim 13 , wherein the delayed pull-up enable signal is generated by a pull-up phase mixer.

17. The method of claim 13 , wherein the delayed pull-down enable signal is generated by a pull-down phase mixer.

18. The method of claim 13 , further comprising:

before driving a terminal, adding a configurable delay to at least one of the pull-up drive signal and the pull-down drive signal.

19. The method of claim 13 , wherein the pull-up enable signal and pull-down enable signal have the same state.

20. The method of claim 13 , further comprising:

generating at least one control word to configure at least one of the pull-up drive signal and the pull-down drive signal.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Division 12041268 · Mar 3, 2008
Related Publication 20100271070A1 · Oct 28, 2010