IP Library Granted Patent US 8,421,520
Granted Patent B2
US 8,421,520 · App. 12/841,106 · Granted Apr 16, 2013

Electric fuse circuit and method of operating the same

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Quick Facts
Patent No.
US 8,421,520
App. No.
12/841,106
Granted
Apr 16, 2013
Kind
B2
Abstract

A fuse circuit includes an electric fuse coupled to a first voltage source; a low resistance unit coupled to the electric fuse and having a junction which is capable of breaking down; and a switching unit coupled between the low resistance unit and a second voltage source.

Claims (26)

1. A fuse circuit comprising:

an electric fuse coupled to a first voltage source;

a low resistance unit coupled to the electric fuse for receiving a predetermined gate voltage, wherein the low resistance unit comprises a transistor in which a breakdown occurs between a drain region and a body;

a switching unit coupled between the body and a second voltage source for receiving a fuse rupture signal; and wherein the breakdown occurs responsive to the predetermined gate voltage and the rupture signal.

2. The fuse circuit according to claim 1 , wherein the transistor of the low resistance unit comprises an NMOS transistor, and the drain of the NMOS transistor is coupled to the electric fuse.

3. The fuse circuit according to claim 2 , wherein the switching unit comprises an NMOS transistor having a gate, a drain and a source,

wherein the fuse rupture signal is inputted to the gate of the switching unit, the drain of the switching unit is coupled to the body of the low resistance unit, the source of the switching unit is coupled to the second voltage source.

4. The fuse circuit according to claim 1 , further comprising:

a latch unit configured to latch a voltage of a coupling node between the electric fuse and the low resistance unit; and

an amplification unit configured to latch an output signal of the latch unit.

5. A fuse circuit comprising:

a current path between a first voltage source and a second voltage source;

a fuse coupled to the first voltage source and formed in the current path; and

a first transistor coupled to receive a predetermined gate voltage at its gate and having a junction that is broken down between a drain and a body of the first transistor by an applied voltage applied to the body, wherein the junction of the first transistor is coupled to the fuse and formed in the current path.

6. The fuse circuit according to claim 5 , further comprising:

a second transistor coupled between the first transistor and the second voltage source to provide the applied voltage for the junction,

wherein the second transistor is coupled to the body of the first transistor.

7. A method of operating a fuse circuit including a fuse coupled with a first voltage source, a first MOS transistor coupled with the fuse, and a second MOS transistor coupled between a body of the first transistor and a second voltage source and driven by a fuse rupture signal, the method comprising:

applying a predetermined gate voltage to a gate of the first MOS transistor and turning on the second MOS transistor using the fuse rapture signal to break down a junction region between a drain and the body of the first MOS transistor, where the breakdown is caused by an applied voltage;

rupturing the fuse; and

detecting whether the fuse is ruptured.

8. The method according to claim 7 , wherein the step of breaking down the low resistance unit comprises the step of:

increasing a potential difference between the first voltage source and the second voltage source with the fuse rupture signal enabled such that the potential difference is greater than a level of a breakdown voltage of the first MOS transistor.

9. The method according to claim 7 , wherein the rupturing of the fuse is determined by a voltage level of a coupling node of the fuse and the low resistance unit.

10. A method of operating a fuse having a fuse coupled to a MOS transistor, comprising: applying a predetermined voltage to a gate of the MOS transistor; and

conducting a current for rupturing the fuse by applying an applied voltage to a body of the MOS transistor to break down a junction between a drain and the body of the MOS transistor a drain with a breakdown state.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE IS HYNIX SEMICONDUCTOR INC. NOT HYNIX-SEMICONDUCTOR INC. THERE IS NO HYPHEN IN THE NAME. PREVIOUSLY RECORDED ON REEL 67328 FRAME 814. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 14, 2024
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067412/0482 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067369/0832 →
CHANGE OF NAME Recorded May 6, 2024
From: HYNIX-SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067328/0814 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2010
From: CHOI, JUN GI
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 024722/0212 →