Electronic module with feed through conductor between wiring patterns
View Patent ↗The electronic module comprises a dielectric 1031 substrate having a first surface and a second surface and an installation cavity extending through the dielectric substrate and having a perimetrical side wall. The electronic module further comprises a first wiring layer 1032 on the first surface, a second wiring layer 1033 on the second surface, and a feed through conductor 1034 on the perimetrical side wall and electrically connecting at least one conductor in the first wiring layer to at least one conductor in the second wiring layer. There is also at least one IC inside the installation cavity. The electronic module further comprises a first insulating layer 1035 on the second wiring layer, a second insulating layer 1036 on the first wiring layer, and a third wiring layer 1037 on the first insulating layer. First microvias 1038 inside the first insulating layer make electrical connections between the second wiring layer and the third wiring layer. Second microvias 1039 electrically connect the IC to at least one of the second wiring layer and the third wiring layer. The electronic module comprises also a fourth wiring layer 1040 on the second insulating layer and third microvias 1041 inside the second insulating layer and making electrical connections between the first wiring layer and the fourth wiring layer.
1. An electronic module comprising:
a dielectric substrate having a first surface and a second surface;
an installation cavity extending through the dielectric substrate and having a perimetrical side wall between the first surface and the second surface;
a first wiring layer on the first surface of the dielectric substrate;
a second wiring layer on the second surface of the dielectric substrate;
a feed through conductor on the perimetrical side wall of the installation cavity and electrically connecting at least one conductor in the first wiring layer to at least one conductor in the second wiring layer;
at least one semiconductor component at least partially inside the installation cavity;
a first insulating layer on the second wiring layer;
a second insulating layer on the first wiring layer;
a third wiring layer on the first insulating layer;
first microvias inside the first insulating layer and making electrical connections between the second wiring layer and the third wiring layer;
second microvias electrically connecting the at least one semiconductor component to at least one of the second wiring layer and the third wiring layer;
a fourth wiring layer on the second insulating layer; and
third microvias inside the second insulating layer and making electrical connections between the first wiring layer and the fourth wiring layer.
2. The electronic module of claim 1 , wherein the at least one semiconductor component comprises at least two contact pads facing the second wiring layer; and at least some of the second microvias electrically connect at least some of the at least two contact pads to the second wiring layer.
3. The electronic module of claim 1 , wherein the at least one semiconductor component comprises at least two contact pads facing the third wiring layer; and at least some of the second microvias electrically connect at least some of the at least two contact pads to the third wiring layer.
4. The electronic module of claim 1 further comprising an insulating material filling the installation cavity between the perimetrical side wall and the at least one semiconductor component.
5. The electronic module of claim 1 , wherein at least one electrical path connects at least one conductor in the third wiring layer to at least one conductor in the fourth wiring layer, the at least one electrical path going through at least one first microvia, at least one conductor in the second wiring layer, at least one feed through conductor, at least one conductor in the first wiring layer and at least one third microvia.
6. The electronic module of claim 1 , wherein the fourth wiring layer defines a conducting plate at the location of the installation cavity and above the at least one semiconductor component.
7. The electronic module of claim 1 , wherein the feed through conductor covers the whole perimetrical side wall of the installation cavity.
8. The electronic module of claim 1 , wherein
the fourth wiring layer defines a conducting plate at the location of the installation cavity and above the at least one semiconductor component;
the feed through conductor covers the whole perimetrical side wall of the installation cavity; and
the conducting plate and the feed through conductor are connectable to a ground potential in order to form a shield against electromagnetic interference above and around the semiconductor component.
9. The electronic module of claim 1 , wherein the feed through conductor is divided into portions such that a plurality of feed through conductors are formed on the perimetrical side wall of the installation cavity, the feed through conductors electrically connecting the first wiring layer and the second wiring to each other by a plurality of individual electrical routes.
10. An electronic module comprising:
a dielectric substrate having a first surface opposite a second surface;
an installation cavity extending through the dielectric substrate and having a perimetrical side wall between the first surface and the second surface;
a first wiring layer on the first surface of the dielectric substrate;
a second wiring layer on the second surface of the dielectric substrate;
at least two feed through conductors on the perimetrical side wall of the installation cavity and electrically connecting the first wiring layer and the second wiring to each other by at least two individual electrical routes;
at least one semiconductor component at least partially inside the installation cavity,
an insulating material filling the installation cavity between the perimetrical side wall and the at least on semiconductor component;
a first insulating layer on the second wiring layer;
a third wiring layer on the first insulating layer; and
first microvias inside the first insulating layer and making electrical connections between the second wiring layer and the third wiring layer.
11. The electronic module of claim 10 , wherein the at least one semiconductor component comprises at least two contact pads facing the third wiring layer; and the module further comprises
second microvias electrically connecting the at least two contact pads to the third wiring layer;
a second insulating layer on the first wiring layer;
a fourth wiring layer on the second insulating layer; and
third microvias inside the fourth insulating layer and making electrical connections between the first wiring layer and the fourth wiring layer.
12. The electronic module of claim 11 , wherein at least one electrical path connects at least one conductor in the third wiring layer to at least one conductor in the fourth wiring layer, the at least one electrical path going through at least one first microvia, at least one conductor in the second wiring layer, at least one feed through conductor, at least one conductor in the first wiring layer and at least one third microvia.
13. The electronic module of claim 10 , wherein
the at least one semiconductor component comprises contact pads facing the third wiring layer;
the least two feed through conductors comprise a plurality of feed through conductors;
the second wiring layer comprises a plurality of first conductors defining contact areas and connecting said contact areas to at least some of the plurality of feed through conductors;
the third wiring layer comprises a plurality of second conductors extending from the location of at least some of the contact pads to the location of at least some of the contact areas;
the module further comprises first microvias electrically connecting at least some of the contact areas to at least some of the second conductors in the third wiring layer; and
the module further comprises a second microvias electrically connecting at least some of the contact pads to at least some of the second conductors in the third wiring layer.
14. The electronic module of claim 11 further comprising a layer of electrically insulating adhesive between the at least one semiconductor component and the third wiring layer; and the second microvias electrically connecting the at least two contact pads to the third wiring layer being located inside the layer of electrically insulating adhesive.
15. A semiconductor chip package comprising:
a dielectric substrate having a first surface opposite a second surface;
an installation cavity extending through the dielectric substrate between the first surface and the second surface, and having a side wall defining said cavity;
at least one semiconductor chip having contact pads inside the installation cavity;
a first wiring layer on the first surface of the dielectric substrate;
a second wiring layer on the second surface of the dielectric substrate;
feed through conductors on the side wall of the installation cavity and electrically connecting the first wiring layer and the second wiring;
a first insulating layer on the second wiring layer;
a third wiring layer on the first insulating layer;
first microvias inside the first insulating layer and making electrical connections between the second wiring layer and the third wiring layer; and
second microvias electrically connecting at least some of the contact pads of the semiconductor chip to the third wiring layer.
16. The semiconductor chip package of claim 15 comprising:
a second insulating layer on the first wiring layer;
a fourth wiring layer on the second insulating layer; and
third microvias inside the second insulating layer and making electrical connections between the first wiring layer and the fourth wiring layer.
17. The electronic module of claim 15 , wherein a plurality of electrical paths connect at least some of the contact pads of the semiconductor chip to the first wiring layer on the first surface of the dielectric substrate.
18. The electronic module of claim 17 , wherein said plurality of electrical paths go through at least one second microvia, at least one conductor in the third wiring layer, at least one first microvia, at least one conductor in the second wiring layer and at least one feed through conductor.