IP Library Granted Patent US 8,455,978
Granted Patent B2
US 8,455,978 · App. 12/847,374 · Granted Jun 4, 2013

Semiconductor circuit structure and method of making the same

Inventor: Sang-Yun Lee (Beaverton, OR)
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Quick Facts
Patent No.
US 8,455,978
App. No.
12/847,374
Granted
Jun 4, 2013
Kind
B2
Abstract

A semiconductor circuit structure includes an interconnect region, and a material transfer region. The semiconductor circuit structure includes a conductive bonding region which couples the material transfer region to the interconnect region through a bonding interface. The conductive bonding region includes a barrier layer between a conductive layer and bonding layer. The bonding layer is positioned towards the material transfer region, and the conductive layer is positioned towards the interconnect region.

Claims (141)

1. A semiconductor structure, comprising:

a support substrate which carries an electronic device;

an interconnect region carried by the support substrate, the interconnect region including a conductive line connected to the electronic device;

a semiconductor material region;

a conductive bonding region which couples the semiconductor material region to the interconnect region through a bonding interface,

wherein the conductive bonding region includes a conductive layer connected to the conductive line, and a barrier layer, the conductive layer being more conductive than the barrier layer;

a control dielectric which extends around the semiconductor material region; and

a control terminal which extends around the control dielectric;

wherein the conductivity of the semiconductor material region is adjustable in response to adjusting a signal provided to the control terminal.

2. The semiconductor structure of claim 1 , wherein the conductive layer is thicker than the barrier layer.

3. The semiconductor structure of claim 1 , wherein the barrier layer extends between the conductive layer and semiconductor material region.

4. The semiconductor structure of claim 1 , wherein the bonding interface is a metal-semiconductor bonding interface.

5. The semiconductor structure of claim 1 , wherein the conductive line extends through a dielectric material.

6. The semiconductor structure of claim 5 , wherein the conductive line is in communication with the barrier layer through the conductive layer.

7. The semiconductor structure of claim 1 , wherein the conductive bonding region includes a bonding layer.

8. The semiconductor structure of claim 7 , wherein the conductive layer is thicker than the bonding layer.

9. The semiconductor structure of claim 7 , wherein the bonding layer is thicker than the barrier layer.

10. The semiconductor structure of claim 7 , wherein the bonding layer is more conductive than the barrier layer.

11. The semiconductor structure of claim 7 , wherein the bonding layer extends between the barrier layer and semiconductor material region.

12. The semiconductor structure of claim 7 , wherein the bonding interface is a metal-semiconductor bonding interface.

13. The semiconductor structure of claim 1 , wherein the semiconductor material region includes a single crystalline semiconductor material region.

14. The semiconductor structure of claim 7 , wherein the conductive line extends through a dielectric material.

15. The semiconductor structure of claim 14 , wherein the conductive line is in communication with the bonding layer.

16. The semiconductor structure of claim 14 , wherein the conductive line is in communication with the bonding layer through the conductive layer.

17. A semiconductor structure, comprising:

a support substrate which carries an electronic device;

an interconnect region carried by the support substrate, the interconnect region including a conductive line in communication with the electronic device;

a conductive bonding region in communication with the conductive line, wherein the conductive bonding region includes a conductive layer and bonding layer, wherein the conductive layer is less resistive than the bonding layer;

semiconductor material region coupled to the interconnect region through the conductive bonding region

a control dielectric which extends around the semiconductor material region; and

a control terminal which extends around the control dielectric;

wherein the conductivity of the semiconductor material region is adjustable in response to adjusting a signal provided to the control terminal.

18. The semiconductor structure of claim 17 , wherein the conductive layer is thicker than the bonding layer.

19. The semiconductor structure of claim 17 , wherein the bonding layer extends between the conductive layer and material transfer region.

20. The semiconductor structure of claim 17 , wherein the conductive bonding region establishes a bonding interface between the interconnect region and material transfer region.

21. The semiconductor structure of claim 20 , wherein the bonding interface is a metal-semiconductor bonding interface.

22. The semiconductor structure of claim 17 , wherein the interconnect region includes a conductive line which extends through a dielectric material.

23. The semiconductor structure of claim 22 , wherein the conductive line is connected to the conductive bonding region.

24. The semiconductor structure of claim 22 , wherein the conductive line is in communication with the bonding layer through the conductive layer.

25. The semiconductor structure of claim 17 , wherein the conductive bonding region includes a barrier layer.

26. The semiconductor structure of claim 25 , wherein the conductive layer is thicker than the barrier layer.

27. The semiconductor structure of claim 25 , wherein the bonding layer is thicker than the barrier layer.

28. The semiconductor structure of claim 25 , wherein the bonding layer is more conductive than the barrier layer.

29. The semiconductor structure of claim 25 , wherein the bonding layer extends between the barrier layer and material transfer region.

30. The semiconductor structure of claim 29 , wherein the bonding layer establishes a metal-semiconductor bonding, interface with the material transfer region.

31. The semiconductor structure of claim 25 , wherein the interconnect region includes a conductive line which extends through a dielectric material.

32. The semiconductor structure of claim 31 , wherein the conductive line is in communication with the bonding layer.

33. The semiconductor structure of claim 31 , wherein the conductive line is in communication with the barrier layer through the conductive layer.

34. A method of forming a semiconductor structure, comprising:

forming a support substrate which carries an electronic device;

forming an interconnect region carried by the support substrate, the interconnect region including a conductive line connected to the electronic device;

forming a conductive bonding region connected to the conductive line, wherein the conductive bonding region includes a conductive layer and bonding layer, wherein the conductive layer is more conductive than the bonding layer;

coupling a material transfer region to the interconnect region by establishing a bonding interface between the material transfer region and conductive bonding region

forming a mesa structure in response to removing a portion of the material transfer region;

forming a control dielectric which extends annularly around the mesa structure; and

forming a control terminal which extends annularly around the control dielectric;

wherein the conductivity of a portion of the mesa structure is adjustable in response to adjusting a signal provided to the control terminal.

35. The method of claim 34 , further including forming the conductive bonding region so the conductive layer is thicker than the barrier layer.

36. The method of claim 34 , further including forming the conductive bonding region so the conductive layer is more conductive than the barrier layer.

37. The method of claim 34 , further including forming the conductive bonding region so the barrier layer extends between the conductive layer and material transfer region.

38. The method of claim 34 , wherein the bonding interface is a metal-semiconductor bonding interface.

39. The method of claim 34 , further including forming the interconnect region by forming a conductive line which extends through a dielectric material region.

40. The method of claim 39 , further including forming the conductive bonding region so the conductive bonding region is connected to the conductive line.

41. The method of claim 39 , further including forming the barrier layer so the barrier layer is in communication with the conductive line through the conductive layer.

42. The method of claim 34 , further including forming the conductive bonding region so the conductive bonding region includes a bonding layer.

43. The structure of claim 42 , further including forming the conductive layer so the conductive layer is thicker than the bonding layer.

44. The method of claim 42 , further including forming the bonding layer so the bonding layer is thicker than the barrier layer.

45. The method of claim 42 , further including forming the bonding layer so the bonding layer is more conductive than the barrier layer.

46. The method of claim 42 , further including forming the bonding layer so the bonding layer extends between the barrier layer and material transfer region.

47. The method of claim 42 , wherein the bonding interface is a metal-semiconductor bonding interface.

48. The method of claim 42 , further including forming the interconnect region by forming a conductive line which extends through a dielectric material region.

49. The method of claim 48 , further including forming the conductive line so the conductive line is in communication with the bonding layer.

50. The method of claim 48 , further including forming the conductive line so the conductive line is in communication with the bonding layer through the conductive layer.

51. A method of forming a semiconductor structure, comprising:

forming a support substrate which carries an electronic device;

forming an interconnect region carried by the support substrate, the interconnect region including a conductive line in communication with the electronic device;

forming a conductive bonding region in communication with the conductive line, wherein the conductive bonding region includes a conductive layer and bonding layer, wherein the conductive layer is more conductive than the bonding layer; and

coupling a material transfer region to the interconnect region through the conductive bonding region

processing the material transfer region to form a mesa structure;

forming a control dielectric which extends proximate to the mesa structure; and

forming a control terminal which extends proximate to the control dielectric;

wherein the conductivity of a portion of the mesa structure is adjustable in response to adjusting signal provided to the control terminal.

52. The method of claim 51 , further including forming the conductive layer so the conductive layer is thicker than the bonding layer.

53. The method of claim 51 , further including forming the conductive bonding region so the conductive bonding region establishes a bonding interface between the interconnect region and material transfer region.

54. The method of claim 53 , wherein the bonding interface is a metal-semiconductor bonding interface.

55. The method of claim 53 , wherein the bonding interface is a metal-semiconductor bonding interface.

56. The method of claim 51 , further including forming the interconnect region by forming a conductive line which extends through a dielectric material region.

57. The method of claim 56 , further including forming the conductive bonding region so the conductive bonding region is in communication with the conductive line.

58. The method of claim 56 , further including forming the bonding layer so the bonding layer is in communication with the conductive line through the conductive layer.

59. The method of claim 51 , further including forming the bonding layer so the bonding layer extends between the conductive layer and material transfer region.

60. The method of claim 59 , wherein forming the material transfer region includes forming a dielectric material region.

61. The method of claim 59 , wherein forming the material transfer region includes forming a semiconductor material region.

62. The method of claim 59 , wherein forming the material transfer region includes forming a single crystalline semiconductor material region.

63. The method of claim 59 , wherein forming the material transfer region includes forming a stack of single crystalline semiconductor material.

64. The method of claim 51 , further including forming a barrier layer with the conductive bonding region.

65. The method of claim 64 , further including forming the conductive layer so the conductive layer is thicker than the barrier layer.

66. The method of claim 64 , further including forming the bonding layer so the bonding layer is thicker than the barrier layer.

67. The method of claim 64 , further including forming the bonding layer so the bonding layer is more conductive than the barrier layer.

68. The method of claim 64 , further including forming the bonding layer so the bonding layer extends between the barrier layer and material transfer region.

69. The method of claim 64 , further including forming the interconnect region by forming a conductive line which extends through a dielectric material region.

70. The method of claim 69 , further including forming the bonding layer so the bonding layer is in communication with the conductive line.

71. The method of claim 69 , further including forming the bonding layer so the bonding layer is in communication with the conductive line through the barrier layer.

72. A semiconductor structure, comprising:

a conductive bonding region;

a semiconductor material region coupled to the conductive bonding region through a bonding interface;

a capacitor in communication with the semiconductor material region;

a control dielectric which extends around the semiconductor material region; and

a control terminal which extends around the control dielectric;

wherein the conductivity of the semiconductor material region is adjustable in response to adjusting a signal provided to the control terminal.

73. The semiconductor structure of claim 72 , wherein the bonding interface is established in response to coupling the semiconductor material region to the conductive bonding region.

74. The semiconductor structure of claim 72 , wherein the bonding interface is a metal-to-metal bonding interface.

75. The semiconductor structure of claim 72 , wherein the semiconductor material region extends between the conductive bonding region and capacitor.

76. The semiconductor structure of claim 72 , wherein the semiconductor material region includes a base support structure.

77. The semiconductor structure a claim 72 , wherein the semiconductor material region includes crystalline semiconductor material.

78. The semiconductor structure of claim 72 , wherein the semiconductor material region includes single crystalline semiconductor material.

79. The semiconductor structure of claim 72 , wherein the capacitor stores a charge in response to a signal flowing through the bonding interface.

80. The semiconductor structure of claim 72 , wherein a charge of the capacitor is adjustable in response to adjusting the conductivity of the semiconductor material region.

81. A semiconductor structure, comprising:

a conductive bonding region;

a mesa structure which includes a semiconductor material region coupled to the conductive bonding region through a bonding interface;

a capacitor in communication with the mesa structure;

a control dielectric which extends annularly around the mesa structure; and

a control terminal which extends annularly around the mesa structure;

wherein the conductivity of the mesa structure is adjustable in response to adjusting a signal provided to the control terminal.

82. The semiconductor structure of claim 81 , wherein a current flow through the bonding interface is adjustable in response to adjusting the signal provided to the control terminal.

83. The semiconductor structure of claim 81 , wherein the operation of the capacitor is controllable in response to the signal provided to the control terminal.

84. The semiconductor structure of claim 81 , wherein the bonding interface is established in response to coupling the semiconductor material region to the conductive bonding region.

85. The semiconductor structure of claim 81 , wherein the bonding interface is a metal-to-metal bonding interface.

86. The semiconductor structure of claim 81 , wherein the mesa structure extends between the conductive bonding region and capacitor.

87. The semiconductor structure of claim 81 , wherein the mesa structure includes crystalline semiconductor material.

88. The semiconductor structure of claim 81 , wherein the mesa structure includes single crystalline semiconductor material.

89. The semiconductor structure of claim 81 , wherein the capacitor stores a charge in response to a signal flowing through the bonding interface and mesa structure.

90. A semiconductor structure, comprising:

a conductive bonding region;

a mesa structure carried by a base support structure, wherein the base support structure includes a semiconductor material region coupled to the conductive bonding region through a bonding interface;

a capacitor in communication with the mesa structure;

a control dielectric which extends around the mesa structure; and

a control terminal which extends around the control dielectric;

wherein the conductivity of the mesa structure is adjustable in response to adjusting a signal provided to the control terminal.

91. The semiconductor structure of claim 90 , wherein the conductivity of the mesa structure is adjustable in response to adjusting the signal provided to the control terminal.

92. The semiconductor structure of claim 90 , wherein a charge of the capacitor is adjustable in response to adjusting the conductivity of the mesa structure.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Apr 27, 2018
From: DAEHONG TECHNEW CORPORATION
To: BESANG INC.
Reel/Frame 045658/0353 →
SECURITY AGREEMENT Recorded May 8, 2013
From: BESANG INC.
To: DAEHONG TECHNEW CORPORATION
Reel/Frame 030373/0668 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2011
From: LEE, SANG-YUN
To: BESANG, INC.
Reel/Frame 025695/0105 →
Continuity (2)
Provisional Application 61349134 · May 27, 2010
Related Publication 20110291234A1 · Dec 1, 2011