Method and apparatus for sending data from multiple sources over a communications bus
In a memory system, multiple memory modules communicate over a bus. Each memory module may include a hub and at least one memory storage unit. The hub receives local data from the memory storage units, and downstream data from one or more other memory modules. The hub assembles data to be sent over the bus within a data block structure, which is divided into multiple lanes. An indication is made of where, within the data block structure, a breakpoint will occur in the data being placed on the bus by a first source (e.g., the local or downstream data). Based on the indication, data from a second source (e.g., the downstream or local data) is placed in the remainder of the data block, thus reducing gaps on the bus. Additional apparatus, systems, and methods are disclosed.
1. A method comprising:
arranging first source data within a first section of a data block structure, wherein the data block structure includes a fixed number of contiguous, configurable bits, and wherein the first source data includes local data from at least one memory storage unit of a first memory module;
receiving a request to send second source data over a communications bus, wherein the second source data includes downstream data from a second memory module;
identifying a location of a breakpoint in the first source data;
arranging at least a portion of the second source data within a second section of the data block structure after the breakpoint, wherein the second section is contiguous with an end of the first section, and wherein the local data and the downstream data are assembled into a data block structure to be sent; and
sending the first source data and the at least a portion of the second source data, forming a portion of the data block structure to be sent, over the communications bus during a same data block transmission period.
2. The method of claim 1 , wherein the data block structure includes a fixed number of lanes.
3. The method of claim 2 , wherein identifying the location comprises identifying a lane that corresponds with a last lane of the first section.
4. The method of claim 2 , wherein identifying the location comprises identifying a lane that corresponds with a first lane of the second section.
5. The method of claim 1 , further comprising:
predicting where a breakpoint will occur in the second source data.
6. The method of claim 1 , wherein data within the data block structure is periodically sent out on a communications bus.
7. The method of claim 2 , wherein each lane of the fixed number of lanes includes a same number of bits.
8. The method of claim 7 , wherein the first section of the data block structure includes a first set of the fixed number of lanes.
9. The method of claim 7 , wherein the second section of the data block structure includes a second set of the fixed number of lanes.
10. A computer-readable medium storing computer-executable instructions that, when executed by a machine, cause the machine to perform a method, the method comprising:
arranging first source data within a first section of a data block structure, wherein the data block structure includes a fixed number of contiguous, configurable bits, and wherein the first source data includes local data from at least one memory storage unit of a first memory module;
receiving a request to send second source data over a the communications bus, wherein the second source data includes downstream data from a second memory module;
identifying a location of a breakpoint in the first source data;
arranging at least a portion of the second source data within a second section of the data block structure after the breakpoint, wherein the second section is contiguous with an end of the first section, and wherein the local data and the downstream data are assembled into a data block structure to be sent; and
sending the first source data and the at least a portion of the second source data, forming a portion of the data block structure to be sent, over the communications bus during a same data block transmission period.
11. The computer-readable medium of claim 10 , wherein the data block structure includes a fixed number of lanes, each lane includes a same number of bits, the first section of the data block structure includes a first set of the fixed number of lanes, and the second section of the data block structure includes a second set of the fixed number of lanes.
12. The computer-readable medium of claim 11 , wherein identifying the location comprises identifying a lane that corresponds with a first lane or a last lane of the first section.
13. The computer-readable medium of claim 11 , wherein identifying the location comprises identifying a lane that corresponds with a first lane or a last lane of the second section.
14. An apparatus for sending data over a communications bus, the apparatus comprising:
a memory module, wherein the memory module is configured to:
receive a first source data from a first data source, wherein the first source data includes local data from at least one memory storage unit of the memory module;
receive a second source data from a second data source, wherein the second source data includes downstream data from a second memory module;
send the first source data and the second source data over the communications bus;
identify a first breakpoint corresponding to an end of the first source data;
send the second source data over the communications bus contiguously with the end of the first source data during a same data block transmission period; and
identify a second breakpoint corresponding to an end of the second source data,
wherein the local data and the downstream data are assembled into a data block structure to be sent, and wherein the structure includes a fixed number of contiguous bits.
15. The apparatus of claim 14 , wherein configuration to send the first source data over the communications bus includes configuration to:
arrange a first portion of the first source data within a data block structure during a first processing period, wherein the data block structure includes a fixed number of contiguous, configurable bits; and
arrange a remainder portion of the first source data within a first section of the data block structure during a second processing period, wherein the first section includes a first set of contiguous bits.
16. The apparatus of claim 15 , wherein configuration to send the first source data over the communications bus further includes configuration to:
make an indication, during the first processing period, that a breakpoint in the first source data will occur during the second processing period.
17. The apparatus of claim 15 , wherein configuration to send the first source data over the communications bus further includes configuration to:
make an indication, during the first processing period, of a location of an end of the first section.
18. The apparatus of claim 15 , wherein the data block structure includes a fixed number of lanes, each lane includes a same number of bits, the first section of the data block structure includes a first set of the fixed number of lanes, and the second section of the data block structure includes a second set of the fixed number of lanes.
19. The apparatus of claim 18 , wherein configuration to send the first source data over the communications bus further includes configuration to:
make an indication, during the first processing period, of a lane identifier that corresponds with a last lane of the first section.
20. The apparatus of claim 18 , wherein configuration to send the first source data over the communications bus further includes configuration to:
make an indication, during the first processing period, of a lane identifier that corresponds with a first lane of the second section.