Interconnect structure for improved time dependent dielectric breakdown

1. A method of forming an interconnect comprising:

providing a device layer on a substrate, wherein the device layer comprises at least one electrical device, an intralevel dielectric over the at least one electrical device, and a contact in electrical communication with the at least one electrical device;

forming an interconnect metal layer on the device layer;

forming a tantalum-containing etch mask on a portion of the interconnect metal layer that is over the contact to the at least one electrical device; and

etching the interconnect metal layer with a methanol based etch chemistry, wherein the etching forms at least one trapezoid shaped interconnect from the interconnect metal layer that is in electrical communication with the contact of the at least one electrical device, the at least one trapezoid shaped interconnect having a first surface in contact with the device layer with a greater width than a second surface of the at least one trapezoid shaped interconnect that is in contact with the tantalum-containing etch mask.

2. The method of claim 1 , wherein the interconnect metal layer is comprised of copper, tungsten, aluminum, molybdenum, ruthenium, gold, cobalt, nickel or combinations thereof.

3. The method of claim 1 , wherein prior to forming the interconnect metal layer a barrier metal layer is formed on the device layer.

4. The method of claim 3 , wherein the barrier metal layer comprises a tantalum layer that is present on the device layer, and a tantalum nitride layer that is present on the tantalum layer.

5. The method of claim 4 , wherein the interconnect metal layer is copper.

6. The method of claim 5 , wherein the forming of the tantalum-containing etch mask comprises:

forming a tantalum layer on the interconnect metal layer;

forming a hard mask on the portion of the tantalum layer that is present over the contact to the at least one electrical device; and

etching the tantalum layer selective to the hard mask and the interconnect metal layer, wherein a remaining portion of the tantalum layer provides the tantalum-containing etch mask.

7. The method of claim 6 , wherein the etching of the interconnect metal layer to provide the at least one trapezoid shaped interconnect comprises reactive ion etching.

8. The method of claim 7 , further comprising etching the barrier metal layer with an anisotropic etch that is selective to the device layer, wherein an etch chemistry for removing the barrier metal layer removes the tantalum-containing etch mask.

9. The method of claim 8 , wherein the at least one trapezoid shaped interconnect includes at least two interconnects, wherein the at least two interconnects are separated by a low-k dielectric material.

10. The method of claim 9 , wherein the low-k dielectric material is deposited using spin on deposition after the tantalum-containing etch mask has been removed.

11. A method of forming an interconnect comprising:

providing a device layer on a substrate, wherein the device layer comprises at least one electrical device, an intralevel dielectric over the at least one electrical device, and a contact in electrical communication with the at least one electrical device;

forming an interconnect metal layer on the device layer;

forming a tantalum-containing etch mask on a portion of the interconnect metal layer that is over the contact to the at least one electrical device, wherein the forming of the tantalum-containing etch mask comprises forming a tantalum layer on the interconnect metal layer, forming a hard mask on the portion of the tantalum layer that is present over the contact to the at least one electrical device, and etching the tantalum layer selective to the hard mask and the interconnect metal layer, wherein a remaining portion of the tantalum layer provides the tantalum-containing etch mask; and

etching the interconnect metal layer to provide at least one trapezoid shaped interconnect in electrical communication with the contact of the at least one electrical device, the at least one trapezoid shaped interconnect having a first surface in contact with the device layer with a greater width than a second surface of the at least one trapezoid shaped interconnect that is in contact with the tantalum-containing etch mask.

12. The method of claim 11 , wherein the etching of the interconnect metal layer to provide the at least one trapezoid shaped interconnect comprises reactive ion etching.

13. The method of claim 12 , further comprising etching the barrier metal layer with an anisotropic etch that is selective to the device layer, wherein an etch chemistry for removing the barrier metal layer removes the tantalum-containing etch mask.

14. The method of claim 13 , wherein the at least one trapezoid shaped interconnect includes at least two interconnects, wherein the at least two interconnects are separated by a low-k dielectric material.

15. The method of claim 14 , wherein the low-k dielectric material is deposited using spin on deposition after the tantalum-containing etch mask has been removed.

16. The method of claim 11 , wherein the interconnect metal layer is comprised of copper, tungsten, aluminum, molybdenum, ruthenium, gold, cobalt, nickel or combinations thereof.

17. The method of claim 11 , wherein prior to forming the interconnect metal layer a barrier metal layer is formed on the device layer.

18. The method of claim 17 , wherein the barrier metal layer comprises a tantalum layer that is present on the device layer, and a tantalum nitride layer that is present on the tantalum layer.

19. The method of claim 18 , wherein the interconnect metal layer is copper.