FLASH MEMORY SYSTEM CONTROL SCHEME
A Flash memory system architecture having serially connected Flash memory devices to achieve high speed programming of data. High speed programming of data is achieved by interleaving pages of the data to be programmed amongst the memory devices in the system, such that different pages of data are stored in different memory devices. A memory controller issues program commands for each memory device. As each memory device receives a program command, it either begins a programming operation or passes the command to the next memory device. Therefore, the memory devices in the Flash system sequentially program pages of data one after the other, thereby minimizing delay in programming each page of data into the Flash memory system. The memory controller can execute a wear leveling algorithm to maximize the endurance of each memory device, or to optimize programming performance and endurance for data of any size.
1 . A method for programming in a Flash memory system having a plurality Flash memory devices, the method comprising:
receiving a data file having a plurality of pages;
if all of the plurality of pages of the data file can fit into a single block of one of the plurality of Flash memory devices, programming all of the plurality of pages of the data file into the single block of the one of the plurality of Flash memory devices;
otherwise, if all of the plurality of pages of the data file can fit into a plurality of blocks including one block in each of the plurality of memory devices, interleave programming all of the plurality of pages of the data file across the plurality of blocks including one block in each of the plurality of memory devices; and
otherwise, interleave programming a subset of the plurality of pages of the data file into a plurality of blocks including one block in each of the plurality of memory devices and removing the subset of the plurality of pages of the data file from the data file.
2 . The method as claimed in claim 1 further comprising repeating interleave programming of the subset of the plurality of pages of the data file into the plurality of blocks including one block in each of the plurality of memory devices and removing the subset of the plurality of pages of the data file from the data file.
3 . The method as claimed in claim 1 further comprising selecting the single block of the one of the plurality of Flash memory devices according to a highest number of remaining program/erase cycles remaining for the memory device.
4 . The method as claimed in claim 1 further comprising selecting the single block of the one of the plurality of Flash memory devices according to a last memory device programmed.
5 . The method as claimed in claim 1 wherein interleave programming comprises sequentially providing program commands to each of the plurality of memory devices.
6 . The method as claimed in claim 5 , wherein the sequentially provided program commands are executed in overlapping time periods.