Substrate having a charged zone in an insulating buried layer
View Patent ↗Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 10 10 charges/cm 2 . The invention also relates to processes for making such substrates.
1. A method of manufacturing a substrate, comprising:
forming an insulating layer on one of a base wafer and a donor wafer;
providing a top semiconductor layer over the insulating layer on a side thereof opposite the one of the base wafer and the donor wafer;
charging at least a zone of the insulating layer to a density of charges in absolute value higher than 10 10 charges/cm 2 ; and
bonding the base wafer and the donor wafer together subsequent to charging at least the zone of the insulating layer, the insulating layer at an interface between the base wafer and the donor wafer.
2. The method of claim 1 , wherein charging at least a zone of the insulating layer comprises doping the insulating layer.
3. The method of claim 1 , wherein charging at least a zone of the insulating layer comprises implanting ions in the insulating layer through the top semiconductor layer.
4. The method of claim 1 , wherein charging at least a zone of the insulating layer comprises bombarding the insulating layer with electrons.
5. The method of claim 1 , wherein charging at least a zone of the insulating layer comprises treating the insulating layer with plasma.
6. The method of claim 1 , wherein forming an insulating layer comprises:
forming a first diffusion barrier layer;
forming a charge-confining layer; and
forming a second diffusion barrier layer.
7. The method of claim 6 , wherein charging at least a zone of the insulating layer comprises activating the charge-confining layer using plasma.
8. The method of claim 6 , wherein charging at least a zone of the insulating layer comprises:
selecting a dopant from the group consisting of boron, phosphor, chlorine, and fluorine; and
growing a doped charge-confining layer comprising the dopant at a concentration of greater than 10 10 /cm 2 .
9. The method of claim 6 , further comprising:
forming the charge-confining layer to comprise silicon nitride; and
forming the first diffusion barrier layer and the second diffusion barrier layer to comprise silicon oxide.
10. The method of claim 1 , further comprising forming charge-trapping islands in the insulating layer prior to bonding the base wafer and the donor wafer together.
11. The method of claim 10 , further comprising forming the charge-trapping islands to comprise silicon.