IP Library › Granted Patent US 8,198,933
Granted Patent B2
US 8,198,933 · App. 12/867,495 · Granted Jun 12, 2012

Mixer circuit

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Quick Facts
Patent No.
US 8,198,933
App. No.
12/867,495
Granted
Jun 12, 2012
Kind
B2
Abstract

A double balanced mixer circuit comprising a differential pair of first amplifier elements responsive to an RF differential input signal, double differential pairs of second amplifier elements responsive to an LO differential input signal, and differential output terminals connected with the second amplifier paths. Coupling elements provide first and second parallel DC connections between DC voltage supply rails for the first and the double second amplifier paths respectively and a series RF connection of the first and second amplifier paths between the supply rails so as to produce a mixed differential amplified signal at the differential output terminals. The coupling elements include respective transmission lines in the first amplifier paths connected between one of the DC voltage supply rails and respective ones of the first amplifier elements and a common transmission line connected between the other of the DC voltage supply rails and both the first amplifier elements.

Claims (27)

1. A double balanced mixer circuit comprising:

a differential pair of first amplifier elements having first differential control terminals and respective first amplifier paths responsive to a first RF differential input signal applied to said first differential control terminals;

double differential pairs of second amplifier elements comprising double second differential control terminals and double second amplifier paths responsive to a second RF differential input signal applied to said double second differential control terminals; and

differential output terminals connected with said double second amplifier paths; and

coupling elements providing first and second parallel DC connections between DC voltage supply rails for said first amplifier paths and said double second amplifier paths respectively and a series RF connection of said first amplifier paths and second double amplifier paths between said supply rails so as to produce a mixed differential amplified signal at said differential output terminals wherein said coupling elements include respective transmission lines in said first amplifier paths connected between one of said DC voltage supply rails and respective ones of said first amplifier elements and a common transmission line connected between the other of said DC voltage supply rails and both said first amplifier elements;

wherein said coupling elements include at least one transmission line connected between said second amplifier elements and said other DC voltage supply rail; and

wherein said coupling elements include transmission lines connected between respective pairs of said second amplifier elements and a node, and another transmission line connected between said node and said other DC voltage supply rail.

2. A mixer circuit as claimed in claim 1 , wherein biasing for said first control terminals and said second control terminals is isolated from RF signals by isolating elements including transmission lines.

3. A mixer circuit as claimed in claim 2 , wherein said transmission lines in said isolating elements are of length substantially equivalent to a quarter wavelength of a fundamental frequency of the RF signals they carry.

4. A mixer circuit as claimed in claim 1 , wherein said series RF connection includes transmission lines connected between said first and said double second amplifier paths.

5. A mixer circuit as claimed in claim 1 , wherein said transmission lines in said coupling elements connected between respective pairs of said second amplifier elements and said node are of length substantially equivalent to a quarter wavelength of a fundamental frequency of the RF signals they carry.

6. A double balanced mixer circuit comprising:

a differential pair of first amplifier elements having first differential control terminals and respective first amplifier paths responsive to a first RF differential input signal applied to said first differential control terminals;

double differential pairs of second amplifier elements comprising double second differential control terminals and double second amplifier paths responsive to a second RF differential input signal applied to said double second differential control terminals;

differential output terminals connected with said double second amplifier paths; and

coupling elements providing first and second parallel DC connections between DC voltage supply rails for said first amplifier paths and said double second amplifier paths respectively and a series RF connection of said first amplifier paths and said double second amplifier paths between said supply rails so as to produce a mixed differential amplified signal at said differential output terminals wherein said coupling elements include respective transmission lines in said first amplifier paths connected between one of said DC voltage supply rails and respective ones of said first amplifier elements and a common transmission line connected between the other of said DC voltage supply rails and both said first amplifier elements;

wherein said coupling elements include at least one transmission line connected between said second amplifier elements and said other DC voltage supply rail; and

wherein said coupling elements include a current mirror comprising a first current mirror branch connected between said DC voltage supply rails and a second current mirror branch connected in series between said second amplifier elements and said other DC voltage supply rail, the current mirror providing a controlled current in said second mirror branch.

7. A mixer circuit as claimed in claim 5 , wherein said first current mirror branch includes a voltage divider connected between said DC voltage supply rails and providing bias for said second amplifier elements.

8. A mixer circuit as claimed in claim 1 , wherein said second RF differential input signal is provided by a local source.

9. A mixer circuit as claimed in claim 1 , wherein each of said first amplifier paths includes a respective one of said transmission lines connected between said one of said DC voltage supply rails and respective ones of said first amplifier elements whose length is substantially equivalent to a quarter wavelength of a fundamental frequency of said RF signals.

10. A mixer circuit as claimed in claim 2 , wherein said series RF connection includes transmission lines connected between said first amplifier paths and said double second amplifier paths.

11. A mixer circuit as claimed in claim 3 , wherein said series RF connection includes transmission lines connected between said first amplifier paths and said double second amplifier paths.

12. A mixer circuit as claimed in claim 1 , wherein said coupling elements include a current mirror comprising a first mirror branch connected between said DC voltage supply rails and a second mirror branch connected in series between said second amplifier elements and said other DC voltage supply rail, the current mirror providing a controlled current in said second mirror branch.

13. A mixer circuit as claimed in claim 6 , wherein said second RF differential input signal is provided by a local source.

14. A mixer circuit as claimed in claim 6 , wherein each of said first amplifier paths includes a respective one of said transmission lines connected between said one of said DC voltage supply rails and respective ones of said first amplifier elements whose length is substantially equivalent to a quarter wavelength of a fundamental frequency of said RF signals.

15. A mixer circuit as claimed in claim 2 , wherein said second RF differential input signal is provided by a local source.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0387 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0334 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027621/0928 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0075 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0477 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 13, 2010
From: SAVERIO, TROTTA
To: FREESCALE SEMICONDUCTOR INC.
Reel/Frame 024832/0414 →