IP Library › Granted Patent US 8,466,538
Granted Patent B2
US 8,466,538 · App. 12/867,922 · Granted Jun 18, 2013

SOI wafer, semiconductor device, and method for manufacturing SOI wafer

Inventors: Tohru Ishizuka (Annaka, JP); Nobuhiko Noto (Annaka, JP); Norihiro Kobayashi (Annaka, JP); Masatake Nakano (Annaka, JP)
Assignee: Shin-Etsu Handotai Co., Ltd.
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Quick Facts
Patent No.
US 8,466,538
App. No.
12/867,922
Granted
Jun 18, 2013
Kind
B2
Abstract

The present invention is an SOI wafer comprising at least: an SOI layer; a silicon oxide film; and a base wafer, wherein the SOI layer has a plane orientation of (100), and the base wafer has a resistivity of 100 Ω·cm or more and a plane orientation different from (100). As a result, there is provided the SOI wafer and the manufacturing method thereof that have no complicated manufacturing step, defects on a bonding interface which are not practically a problem in number and a high interface state density (Dit) for trapping carriers on an interface of a BOX layer and the base wafer.

Claims (17)

1. An SOI wafer comprising at least:

an SOI layer;

a silicon oxide film; and

a base wafer,

wherein:

the SOI layer has a plane orientation of (100);

the base wafer has a resistivity of 100 Ω·cm or more; and

the base wafer has a plane orientation of (110), the base wafer has a plane orientation of (111), or the base wafer has a plane orientation that has an off-angle of 1 degree or more and less than 45 degrees from (100).

2. A semiconductor device comprising at least an RF device formed on the SOI layer of the SOI wafer according to claim 1 .

3. A method for manufacturing an SOI wafer comprising at least:

bonding a base wafer and a bond wafer, each of which is formed of a silicon single crystal, to each other through a silicon oxide film; and

reducing a film thickness of the bond wafer to form an SOI layer, wherein:

the bond wafer has a plane orientation of (100);

the base wafer has a resistivity of 100 Ω·cm or more; and

the base wafer has a plane orientation of (110), the base wafer has a plane orientation of (111), or the base wafer has a plane orientation that has an off-angle of 1 degree or more and less than 45 degrees from (100).

4. The method for manufacturing an SOI wafer according to claim 3 , wherein the bond wafer has an ion-implanted layer formed near a surface thereof by implanting at least one of a hydrogen ion and a rare gas ion from the surface thereof, and a film thickness of the bond wafer is reduced by bonding the bond wafer to the base wafer through the silicon oxide film and then performing delamination at the ion-implanted layer.

5. The method for manufacturing an SOI wafer according to claim 4 , wherein the silicon oxide film is formed on a surface of the base wafer and then the base wafer is bonded to the bond wafer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2010
From: ISHIZUKA, TOHRU; NOTO, NOBUHIKO; KOBAYASHI, NORIHIRO; NAKANO, MASATAKE
To: SHIN-ETSU HANDOTAI CO., LTD.
Reel/Frame 024849/0912 →
Priority Claims (1)
JP 2008-072174 · Mar 19, 2008 · national
Continuity (1)
Related Publication 20100314722A1 · Dec 16, 2010