IP Library Granted Patent US 8,383,492
Granted Patent B2
US 8,383,492 · App. 12/872,218 · Granted Feb 26, 2013

Method for the production of thin layer of silicon by utilization of mismatch in coefficient of thermal expansion between screen printed metal layer and silicon mother substrate

Inventors: Frederic Dross (Schaarbeek, BE); Emmanuel Van Kerschaver (Wezemaal, BE); Guy Beaucarne (Oud-Heverlee, BE)
Assignees: IMEC; Katholieke Universiteit Leuven, K.U. Leuven R&D
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Quick Facts
Patent No.
US 8,383,492
App. No.
12/872,218
Granted
Feb 26, 2013
Kind
B2
Abstract

A method is provided for producing a thin substrate with a thickness below 750 microns, comprising providing a mother substrate, the mother substrate having a first main surface and a toughness; inducing a stress with predetermined stress profile in at least a portion of the mother substrate, said portion comprising the thin substrate, the induced stress being locally larger than the toughness of the mother substrate at a first depth under the main surface; such that the thin substrate is released from the mother substrate, wherein the toughness of the mother substrate at the first depth is not lowered prior to inducing the stress. The method can be used in the production of, for example, solar cells.

Claims (49)

1. A method for producing a thin layer of silicon, comprising:

screen printing a metal layer atop a silicon mother substrate;

annealing the silicon mother substrate and the metal layer at a temperature above 700° C.; and

at least partially cooling the metal layer, whereby the metal layer undergoes a thermal contraction, leading to a high stress field in the silicon mother substrate due to a mismatch in a coefficient of thermal expansion between the metal layer and the silicon mother substrate, causing the metal layer to peel off the silicon mother substrate with a thin layer of silicon from the silicon mother substrate attached thereto.

2. The method of claim 1 , wherein a thickness of the mother substrate is less than 300 μm and wherein a thickness of the thin layer of silicon is from 10 μm to 100 μm.

3. The method of claim 1 , wherein the metal is Ag or Al.

4. The method of claim 1 , wherein the silicon mother substrate is p-type multi-crystalline silicon, and wherein the silicon mother substrate and the metal layer are annealed at a temperature above 700° C. for a few seconds.

5. The method of claim 1 , further comprising repeating the steps of screen printing, annealing, and cooling.

6. The method of claim 1 , further comprising temporarily bonding the metal layer to a stretchable carrier substrate.

7. The method of claim 1 , wherein the thin layer of silicon has an area up to 10 cm 2 and a thickness of 50 μm+/−10 μm.

8. The method of claim 1 , wherein a mismatch between a thermal expansion coefficient of the silicon mother substrate and the metal layer is larger than 15×10 −6 K −1 .

9. The method of claim 1 , wherein the metal layer and the silicon mother substrate are both cooled.

10. The method of claim 1 , wherein the silicon mother substrate is amorphous.

11. The method of claim 1 , wherein the silicon mother substrate has a crystalline structure selected from the group consisting of nano-crystalline, micro-crystalline, polycrystalline, multi-crystalline, and mono-crystalline.

12. The method of claim 1 , wherein the silicon mother substrate is flat.

13. The method of claim 1 , wherein a surface of the silicon mother substrate upon which the metal layer is screen printed is convex or concave.

14. The method of claim 1 , wherein a surface of the silicon mother substrate upon which the metal layer is screen printed is texturized.

15. The method of claim 1 , further comprising bending or elastically deforming the silicon mother substrate to assist in release of the thin layer of silicon.

16. The method of claim 1 , further comprising providing a local weakness in the silicon mother substrate, wherein the weakness is a weak layer selected from the group consisting of porous silicon and silicon oxide.

17. The method of claim 1 , wherein the metal layer comprises a double layer of Ag or Al metal paste.

18. The method of claim 1 , further comprising:

cleaning the thin layer of silicon in a mixture of HCl and H 2 O 2 ; thereafter

cleaning the thin layer of silicon in a mixture of H 2 O 2 and H 2 SO 4 ; and thereafter

dipping the thin layer of silicon in HF to remove oxide formed in the cleaning previous steps.

19. The method of claim 1 , further comprising depositing a bottom layer of material atop the silicon mother substrate before screen printing the metal layer, and removing the metal layer from the thin layer of silicon to yield the thin layer of silicon atop the bottom layer, wherein the bottom layer is an electrical contact or a support layer for the thin layer of silicon after the metal layer is removed.

20. The method of claim 19 , wherein the bottom layer is transparent, and comprises a front surface of a processed solar cell.

21. The method of claim 1 , wherein a thickness of the thin layer of silicon is above 100 μm and below 750 μm.

22. A method for producing a thin layer of silicon, consisting of:

applying a metal paste atop a silicon mother substrate by screen printing;

drying the metal paste at 200° C. for a few minutes;

firing the dried metal paste at a temperature above 700° C. for a few seconds, whereby a metal layer is obtained; and

at least partially cooling the metal layer, whereby the metal layer undergoes a thermal contraction, leading to a high stress field in the silicon mother substrate due to a mismatch in a coefficient of thermal expansion between the metal layer and the silicon mother substrate, causing the metal layer to peel off the silicon mother substrate with a thin layer of silicon from the silicon mother substrate attached thereto.

23. A method for producing a thin layer of silicon, comprising:

screen printing an Ag layer atop a silicon mother substrate;

annealing the silicon mother substrate and the Ag layer at a temperature of over 800° C. for a few seconds;

screen printing an Al layer atop the Ag layer;

annealing the Al layer at a temperature of over 800° C. for a few seconds; and

at least partially cooling the metal layer, whereby the Ag and Al layers undergo a thermal contraction, leading to a high stress field in the silicon mother substrate due to a mismatch in a coefficient of thermal expansion between the Ag and Al layers and the silicon mother substrate, causing the Ag and Al layers to peel off the silicon mother substrate with a thin layer of silicon from the silicon mother substrate attached thereto.

24. The method of claim 23 , further comprising removing the Ag and Al layers from the thin layer of silicon by dipping in a warm HCl solution and thereafter in a mixture of HCl and HNO 3 .

25. The method of claim 19 , wherein the bottom layer is transparent and is configured to function as a front surface of a solar cell, the method further comprising applying a back-contact process to the thin layer of silicon.

26. The method of claim 1 , further comprising selecting a plane of an interface between the silicon mother substrate and the metal layer so as to maximize roughness of a surface of the thin layer of silicon, whereby light trapping of the surface is maximized such that the surface is configured to function as a front side of a solar cell.

27. The method of claim 1 , further comprising selecting a plane of an interface between the silicon mother substrate and the metal layer so as to minimize roughness of a surface of the thin layer of silicon, whereby passivation of the surface is facilitated such that the surface is configured to function as a rear surface of a solar cell.

28. The method of claim 18 , further comprising:

deposition of a P-rich oxide and P-diffusion at a temperature above 800° C. on the thin layer of silicon;

metal evaporation with a shadow mask to form front contacts;

metal evaporation to form back contacts;

annealing the front contacts and back contacts;

deposition of a ZnS/MgF 2 anti-reflection-coating; and

edge saw dicing, whereby a solar cell is obtained.

Assignments (4)
CHANGE OF NAME Recorded Oct 8, 2010
From: INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM
To: IMEC
Reel/Frame 025116/0792 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2010
From: DROSS, FREDERIC; VAN KERSCHAVER, EMMANUEL; BEAUCARNE, GUY
To: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC)
Reel/Frame 025101/0346 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2010
From: IMEC
To: KATHOLIEKE UNIVERSITEIT LEUVEN, K.U. LEUVEN R&D
Reel/Frame 025102/0189 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 2, 2010
From: DROSS, FREDERIC; VAN KERSCHAVER, EMMANUEL; BEAUCARNE, GUY
To: IMEC
Reel/Frame 024930/0034 →
Priority Claims (1)
EP 06011050 · May 30, 2006 · regional
Continuity (3)
Continuation 11736929 · Apr 18, 2007
Provisional Application 60793098 · Apr 19, 2006
Related Publication 20100323472A1 · Dec 23, 2010