IP Library Granted Patent US 8,012,775
Granted Patent B2
US 8,012,775 · App. 12/882,640 · Granted Sep 6, 2011

Method of forming a light activated silicon controlled switch

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Quick Facts
Patent No.
US 8,012,775
App. No.
12/882,640
Granted
Sep 6, 2011
Kind
B2
Abstract

The present invention provides a method of forming an optically triggered switch. Embodiments of the method include forming a silicon layer, forming one or more trenches in the silicon layer, and forming one or more silicon diodes in the silicon layer. Embodiments of the method also include forming a first thyristor in the silicon layer such that the first thyristor is physically and electrically isolated from the silicon diode(s) by the trench(es). The first thyristor is configured to turn on in response to electromagnetic radiation generated by the silicon diode(s).

Claims (22)

1. A method of forming an optically triggered switch, comprising:

forming a silicon layer;

forming at least one trench in the silicon layer;

forming at least one silicon diode in the silicon layer; and

forming a first thyristor in the silicon layer such that the first thyristor is physically and electrically isolated from said at least one silicon diode by said at least one trench, and the first thyristor is configured to turn on in response to electromagnetic radiation generated by said at least one silicon diode.

2. The method of claim 1 , wherein forming the first thyristor comprises:

forming a first p-type region formed in the silicon layer;

forming a first n-type region formed within the first p-type region;

forming a second p-type region formed within the first n-type region; and

forming at least one second n-type region formed within the second p-type region.

3. The method of claim 2 , wherein forming the first thyristor comprises:

forming an anode in contact with the first p-type region; and

forming a cathode in contact with said at least one second n-type region.

4. The method of claim 3 , comprising forming a second thyristor by forming a third n-type region formed within the second p-type region, the third n-type region being formed such that the electromagnetic radiation generated by said at least one silicon diode turns on the second thyristor.

5. The method of claim 4 , comprising:

forming a third thyristor coupled to an amplifying gate, the third thyristor comprising a fourth n-type region formed in the second p-type region; and

forming a first cathode short comprising a third p-type region coupled to the amplifying gate.

6. The method of claim 5 , wherein a first current is generated in the first n-type region and the second p-type region by the electromagnetic radiation, and wherein forming the second thyristor comprises forming the second thyristor such that the first current creates a first voltage drop that forward biases the second thyristor.

7. The method of claim 6 , wherein forming the second thyristor comprises forming the second thyristor such that the second thyristor generates a second current when the second thyristor is turned on.

8. The method of claim 7 , wherein forming the third thyristor comprises forming the third thyristor such that the second current creates a second voltage drop that forward biases the third thyristor.

9. The method of claim 8 , wherein forming the third thyristor comprises forming the third thyristor such that the third thyristor generates a third current when the third thyristor is turned on.

10. The method of claim 9 , wherein forming the first thyristor comprises forming the first thyristor such that the first thyristor turns on in response to the third current exceeding a latching current of the first thyristor.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.; MICROSEMI SOC CORP.; MICROSEMI CORP. - POWER PRODUCTS GROUP; MICROSEMI CORP. - RF INTEGRATED SOLUTIONS
Reel/Frame 046251/0391 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION); MICROSEMI SOC CORP. (F/K/A ACTEL CORPORATION); MICROSEMI CORP. - POWER PRODUCTS GROUP (F/K/A ADVANCED POWER TECHNOLOGY INC.); MICROSEMI CORP. - RF INTEGRATED SOLUTIONS (F/K/A AML COMMUNICATIONS, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
NOTICE OF SUCCESSION OF AGENCY Recorded Apr 9, 2015
From: ROYAL BANK OF CANADA (AS SUCCESSOR TO MORGAN STANLEY & CO. LLC)
To: BANK OF AMERICA, N.A., AS SUCCESSOR AGENT
Reel/Frame 035657/0223 →
PATENT SECURITY AGREEMENT Recorded Nov 26, 2013
From: MICROSEMI SEMICONDUCTOR (U.S.) INC.
To: MORGAN STANLEY & CO. LLC
Reel/Frame 031729/0667 →
CHANGE OF NAME Recorded Nov 18, 2013
From: ZARLINK SEMICONDUCTOR (U.S.) INC.
To: MICROSEMI SEMICONDUCTOR (U.S.) INC.
Reel/Frame 031746/0214 →