Semiconductor device and method of manufacturing the same
View Patent ↗According to one embodiment, a semiconductor device including a tunnel FET, includes a gate electrode, which is formed on a first semiconductor layer formed of Si 1−X Ge X (0<x≦1) through a gate insulating film, a source electrode, which is formed of a compound of a second semiconductor formed mainly using Ge and a metal, a drain electrode, which is formed of a compound of the first semiconductor layer and the metal, and a silicon (Si) thin film, which is formed between the source electrode and the first semiconductor layer. An edge portion of the source electrode and an edge portion of the drain electrode have a positional relationship of Asymmetrical to the gate electrode. The edge portion of the drain electrode is far away from an edge portion of the gate electrode toward a gate external direction compared with the edge portion of the source electrode.
1. A semiconductor device comprising:
a first semiconductor layer, which is made of Si 1−X Ge X (0<x≦1);
a gate electrode, which is formed on the first semiconductor layer through a gate insulating film and has two sides opposite to each other;
a source electrode, which is formed on one of the two sides of the gate electrode and on the first semiconductor layer, the source electrode being made of a compound of a metal and a second semiconductor including Ge;
a drain electrode, which is formed on the other of the two sides of the gate electrode and on the first semiconductor layer, the drain electrode being made of a compound of the metal and a material of the first semiconductor layer; and
a silicon (Si) thin film as a tunnel barrier, which is formed between the source electrode and the first semiconductor layer and in contact with the source electrode,
wherein an edge portion on a gate side of the source electrode and an edge portion on a gate side of the drain electrode have a positional relationship of being asymmetrical to a gate side of the gate electrode, such that the edge portion on the gate side of the drain electrode is spaced farther away from an edge portion of the gate electrode in a gate length direction than the edge portion on the gate side of the source electrode.
2. The device according to claim 1 , wherein an edge portion on a source side of the gate electrode coincides with an interface between the Si thin film and the source electrode.
3. The device according to claim 1 , wherein an edge portion on a source side of the gate electrode overlaps the source electrode.
4. The device according to claim 1 , wherein the first semiconductor layer, the gate electrode, the gate insulating film, the source electrode, the drain electrode and the Si thin film form an n-type field-effect transistor (FET).
5. The device according to claim 4 , wherein the first semiconductor layer has a compression strain.
6. The device according to claim 4 , wherein at least one of S and Se is segregated to an interface between the source electrode and the Si thin film and an interface between the drain electrode and the first semiconductor layer.
7. The device according to claim 1 , wherein the first semiconductor layer, the Si thin film, the source electrode and the drain electrode are insulatively disposed over a substrate.
8. The device according to claim 1 , wherein each metal of the source electrode and the drain electrode is made of a metal compound of Ge and Ni or Pt.
9. The device according to claim 1 , wherein a width of the Si thin film in the gate length direction is between 1 and 3 nm inclusive.
10. The device according to claim 1 , wherein an interface between the source electrode and the Si thin film forms a Schottky junction.