IP Library › Granted Patent US 8,501,630
Granted Patent B2
US 8,501,630 · App. 12/892,912 · Granted Aug 6, 2013

Selective etch process for silicon nitride

Inventors: Andrew W. Metz (Loundonville, NY); Hongyun Cottle (Guilderland, NY)
Assignee: Tokyo Electron Limited
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Quick Facts
Patent No.
US 8,501,630
App. No.
12/892,912
Granted
Aug 6, 2013
Kind
B2
Abstract

A method for selectively etching a substrate is described. The method includes preparing a substrate comprising a silicon nitride layer overlying a silicon-containing contact region, and patterning the silicon nitride layer to expose the silicon-containing contact region using a plasma etching process in a plasma etching system. The plasma etching process uses a process composition having as incipient ingredients a process gas containing C, H and F, and a non-oxygen-containing additive gas, wherein the non-oxygen-containing additive gas includes H, or C, or both H and C, and excludes a halogen atom.

Claims (20)

1. A method for selectively etching a substrate, comprising:

preparing a substrate comprising a silicon nitride layer overlying a silicon-containing contact region;

patterning said silicon nitride layer to expose said silicon-containing contact region using a plasma etching process in a plasma etching system, wherein said plasma etching process uses a process composition consisting of, as incipient ingredients, CH 3 F, C 2 H 4 as a halogen-free additive gas, O 2 and an optional noble gas; and

optimizing said plasma etching process to achieve an etch selectivity between said silicon nitride layer and said silicon-containing contact region that exceeds 20:1.

2. The method of claim 1 , further comprising:

preparing said substrate with a silicon oxide layer; and

optimizing said plasma etching process to achieve an etch selectivity between said silicon nitride layer and said silicon oxide layer that exceeds 20:1.

3. The method of claim 2 , wherein a flow rate of said CH 3 F gas ranges from about 1 sccm to about 50 sccm, a flow rate of said C 2 H 4 gas ranges from about 5 sccm to about 20 sccm; and a flow rate of said O 2 gas ranges from about 1 sccm to about 50 sccm.

4. The method of claim 1 , wherein said plasma etching process includes setting a pressure in said plasma etching system ranging from 10 mTorr to 80 mTorr.

5. The method of claim 1 , wherein said plasma etching process includes coupling first radio frequency (RF) power at a first frequency to a substrate holder upon which said substrate rests in said plasma etching system, and coupling second radio frequency (RF) power at a second frequency to an upper electrode opposing said substrate on said substrate holder.

6. The method of claim 1 , wherein said substrate rests on a temperature controlled substrate holder in said plasma etching system, said temperature controlled substrate holder comprises:

a support base having fluid channels to circulate a temperature controlled thermal fluid in said support base; and

a substrate support coupled via a thermal insulator to an upper portion of said support base, said substrate support comprising:

one or more heating elements embedded within said substrate support,

an upper surface to support said substrate by contact between said upper surface and a backside of said substrate, and

an electrostatic clamp electrode to hold said substrate on said upper surface of said substrate support.

7. The method of claim 6 , wherein said temperature controlled substrate holder further comprises:

a backside gas supply system configured to supply a heat transfer gas to the backside of said substrate through at least one of a plurality of orifices or channels disposed on said upper surface of said substrate support, wherein said plurality of orifices of said backside gas supply system are arranged in a plurality of zones on said upper surface of said substrate support to vary a backside pressure in a radial direction between a substantially central region of the backside of said substrate and a substantially edge region of the backside of said substrate.

8. The method of claim 1 , wherein said silicon-containing contact region comprises a source region or drain region for a transistor.

9. The method of claim 1 , wherein said silicon-containing contact region comprises doped silicon or metal silicide.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2010
From: METZ, ANDREW W.; COTTLE, HONGYUN
To: TOKYO ELECTRON LIMITED
Reel/Frame 025056/0898 →
Continuity (1)
Related Publication 20120077347A1 · Mar 29, 2012