Semiconductor device
View Patent ↗A semiconductor device includes a PMOS transistor of a peripheral circuit region. The PMOS transistor is formed over a silicon germanium layer to have a compressive strain structure, thereby increasing hole mobility of a channel region in operation of the device. The semiconductor device may include a second active region including a silicon layer connected to a first active region of a semiconductor substrate, a silicon germanium layer formed over the silicon layer expected to be a PMOS region, and a PMOS gate formed over the silicon germanium layer.
1. A semiconductor device comprising:
a first active region formed in a semiconductor substrate;
a second active region located over the first active region, wherein the second active region is coupled to the first active region;
a silicon germanium layer formed in a PMOS region of the second active region;
a PMOS gate formed over the silicon germanium layer formed in the PMOS region of the second active region; and
an NMOS gate formed over the second active region.
2. The semiconductor device according to claim 1 , wherein the second active region includes a silicon layer.
3. The semiconductor device according to claim 1 , further comprising an intervening layer between the first active region and the second active region.
4. The semiconductor device according to claim 1 , wherein a mole ratio of germanium in the silicon germanium layer is 0.05 to 0.35.
5. The semiconductor device according to claim 1 , further comprising:
an insulating film formed over the first active region;
a contact hole which exposes the first active region and penetrates the insulating film; and
a silicon layer formed in the contact hole and on the insulating film.
6. The semiconductor device according to claim 5 , wherein the silicon layer is a selective epitaxial growth layer.
7. The semiconductor device according to claim 5 , wherein the silicon layer has a thickness in a range of 500 Å to 20000 Å from a surface of the insulating film.
8. The semiconductor device according to claim 1 , wherein the silicon germanium layer has a thickness ranging from 500 Å to 5000 Å.
9. A semiconductor device comprising:
an active region formed in a semiconductor substrate;
a silicon germanium layer formed in a PMOS region of the active region;
a PMOS gate formed over the silicon germanium layer formed in a PMOS region of the active region; and
an NMOS gate formed over the active region.
10. The semiconductor device according to claim 9 , wherein the active region includes a silicon layer.
11. The semiconductor device according to claim 9 , wherein a mole ratio of germanium in the silicon germanium layer is 0.05 to 0.35.
12. The semiconductor device according to claim 9 , wherein the silicon germanium layer has a thickness ranging from 500 Å to 5000 Å.