Semiconductor device and method for fabricating the same

1. A semiconductor device, comprising:

a first well in a substrate;

a second well in the substrate, the second well comprising an impurity doping concentration that is different from an impurity doping concentration of the first well;

a first isolation layer in the first well;

a second isolation layer in the second well, the second isolation layer comprising a structure that is different from a structure of the first isolation layer; and

a third isolation layer in a boundary region in which the first well and the second well are in contact, the third isolation layer comprising a combination of the structure of the first isolation layer and the structure of the second isolation layer.

2. The semiconductor device of claim 1 , wherein the substrate comprises a low-voltage region and a high-voltage region,

wherein the first well is in the low-voltage region, and

wherein the second well is in the high-voltage region.

3. The semiconductor device of claim 1 , wherein the impurity doping concentration of the first well is greater than the impurity doping concentration of the second well.

4. The semiconductor device of claim 1 , wherein the first isolation layer comprises a depth that is less than a depth of the second isolation layer, and

wherein the third isolation layer comprises the depth of the first isolation layer and the depth of the second isolation layer.

5. The semiconductor device of claim 4 , wherein an interface in which the first isolation layer and the second isolation layer are in contact with each other is aligned with an interface in which the first well and the second well are in contact with each other.

6. A semiconductor device, comprising:

a substrate of a first conductivity type;

a first well of a second conductivity type, the first well being on the substrate;

a second well of the second conductivity type, the second well being on the substrate and comprising an impurity doping concentration that is less than an impurity doping concentration of the first well;

a first isolation layer in the first well, the first isolation layer comprising a first structure and a first depth;

a second isolation layer in the second well, the second isolation layer comprising a second structure and a second depth, the first structure being different from a second structure, and the second depth being greater than the first depth; and

a third isolation layer in a boundary region in which the first well and the second well are in contact, the third isolation layer comprising a combination of the structure of the first isolation layer and the structure of the second isolation layer.

7. The semiconductor device of claim 1 , wherein the structure of the first isolation layer comprises a shallow trench isolation (STI) structure, and

wherein the structure of the second isolation layer comprises a medium isolation trench (MTI) structure.