IP Library Granted Patent US 8,858,818
Granted Patent B2
US 8,858,818 · App. 12/895,730 · Granted Oct 14, 2014

Method for minimizing defects in a semiconductor substrate due to ion implantation

Inventors: Pushkar Ranade (Los Gatos, CA); Toshifumi Mori (Hachiouji, JP); Ken-ichi Okabe (Kuwana, JP); Toshiki Miyake (Kuwana, JP)
Assignee: SuVolta, Inc.
H01L21/26513H04L21/26506
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Quick Facts
Patent No.
US 8,858,818
App. No.
12/895,730
Granted
Oct 14, 2014
Kind
B2
Abstract

The effects of knock-on oxide in a semiconductor substrate are reduced by providing a semiconductor substrate and forming a thin layer of native oxide on the semiconductor substrate. Ion implantation is performed through the native oxide layer. The native oxide layer reduces the phenomenon of knock-on oxide and oxygen concentration within the semiconductor substrate. Further reduction may be achieved by etching the surface of the semiconductor substrate in order to eliminate a concentration of oxygen at a surface of the semiconductor substrate.

Claims (11)

1. A method for minimizing defects in a semiconductor substrate due to ion implantation, comprising:

providing a semiconductor substrate;

prior to any other material being formed in or on the substrate:

forming a native oxide layer across all of a top surface of the semiconductor substrate by dipping the semiconductor substrate in a first chemical wet bath, the native oxide layer protecting the top surface of the semiconductor substrate;

upon forming the native oxide layer, performing ion implantation through the native oxide layer to establish a transistor device in a region of the semiconductor substrate, wherein a dopant material used in the ion implantation is selected from one or more of germanium, boron, carbon, and arsenic;

removing the native oxide layer in its entirety after ion implantation;

after removal, etching all of the top surface of the semiconductor substrate including the region of the ion implantation, the etching removing the semiconductor substrate in an amount sufficient to remove oxygen driven into a silicon lattice of the semiconductor substrate from the ion implantation, the etching performed by dipping the semiconductor substrate into a second chemical wet bath, the etching establishing a new top surface of the semiconductor substrate;

after etching, forming an epitaxial layer across all of the new top surface of the semiconductor substrate, including the region of the ion implantation, to establish a channel region on the semiconductor substrate;

forming other materials in and on the semiconductor substrate to establish a PMOS or NMOS device at the region of the ion implantation depending on the dopant material selected.

2. The method of claim 1 , wherein the native oxide is removed using a first chemical solution and the semiconductor substrate is etched away using a second chemical solution, wherein the first chemical solution is hydrofluoric acid.

3. The method of claim 1 , wherein the native oxide is removed using a first chemical solution and the semiconductor substrate is etched away using a second chemical solution, wherein the second chemical solution is selected from a group consisting of tetramethylammonium hydroxide, potassium hydroxide, and ammonium hydroxide.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: SU VOLTA, INC.
To: MIE FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 035508/0113 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE ADDRESS ZIP CODE TO REFLECT 95032 PREVIOUSLY RECORDED ON REEL 025928 FRAME 0066. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNEE ADDRESS ZIP CODE PREVIOUSLY REFLECTED 75032. Recorded May 24, 2011
From: FUJITSU SEMICONDUCTOR LIMITED, INC.
To: SUVOLTA, INC.
Reel/Frame 026328/0690 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT ASSIGNEE ADDRESS TO REFLECT SHIN-YOKOHAMA AND POSTAL CODE 222-0033 PREVIOUSLY RECORDED ON REEL 025928 FRAME 0358. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNEE ADDRESS PREVIOUSLY REFLECTED SHIM-YOKOHAMA AND POSTAL CODE 222-033. Recorded May 24, 2011
From: MORI, TOSHIFUMI; OKABE, KEN-ICHI; MIYAKE, TOSHIKI
To: FUJITSU SEMICONDUCTOR LIMITED, INC.
Reel/Frame 026328/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 9, 2011
From: FUJITSU SEMICONDUCTOR LIMITED, INC.
To: SUVOLTA, INC.
Reel/Frame 025928/0066 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 9, 2011
From: RANADE, PUSHKAR
To: SUVOLTA, INC.
Reel/Frame 025928/0120 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 9, 2011
From: MORI, TOSHIFUMI; OKABE, KEN-ICHI; MIYAKE, TOSHIKI
To: FUJITSU SEMICONDUCTOR LIMITED, INC.
Reel/Frame 025928/0358 →
Continuity (1)
Related Publication 20120083132A1 · Apr 5, 2012