Advanced Transistors with Threshold Voltage Set Dopant Structures
An advanced transistor with threshold voltage set dopant structure includes a gate with length Lg and a well doped to have a first concentration of a dopant. A screening region is positioned between the well and the gate and has a second concentration of dopant greater than 5×10 18 dopant atoms per cm 3 . A threshold voltage set region is formed by placement of a threshold voltage offset plane positioned above the screening region. The threshold voltage set region may be formed by delta doping and have a thickness between Lg/5 and Lg/1. The structure uses minimal or no halo implants to maintain channel dopant concentration at less than 5×10 17 dopant atoms per cm 3 .
1 . A field effect transistor structure, comprising
a well doped to have a first concentration of a dopant,
a screening region positioned between the well and the gate and having a second concentration of dopant greater than 5×10 18 dopant atoms per cm 3 ,
a threshold voltage set region formed by placement of a threshold voltage offset plane, with the threshold voltage offset plane positioned above the screening region.
2 . The field effect transistor structure of claim 1 , wherein the voltage threshold offset plane is deposited by delta doping.
3 . The field effect transistor structure of claim 1 , wherein the voltage threshold offset plane is positioned between about 3 nanometers to about 10 nanometers from the screening region.
4 . The field effect transistor structure of claim 1 , further comprising multiple threshold voltage offset planes.
5 . The field effect transistor structure of claim 1 , further comprising a channel doped to have a density less than about 5×10 17 dopant atoms per cm 3 adjacent to a gate dielectric.
6 . A method for forming a field effect transistor structure, comprising the steps of forming a well doped to have a first concentration of a dopant,
implanting a screening region into the well having a dopant concentration dopant of greater than 5×10 18 dopant atoms per cm 3 ,
growing an epitaxial layer on top of the screening region, the epitaxial layer having a thickness selected to be between about Lg/5 and about Lg/1,
forming a threshold voltage offset plane in the layer grown on the screening region, and
forming a gate having gate length Lg between a source and a drain, and above the screening region.
7 . The method of claim 6 for forming a field effect transistor structure, wherein the step of forming a threshold voltage offset plane in the layer grown on the screening region further comprises the step of delta doping.
8 . The method of claim 6 for forming a field effect transistor structure, wherein the step of forming a threshold voltage set offset plane in the layer grown on the screening region further comprises multiple delta doping.