IP Library Granted Patent US 8,076,211
Granted Patent B2
US 8,076,211 · App. 12/912,829 · Granted Dec 13, 2011

Fabricating bipolar junction select transistors for semiconductor memories

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Quick Facts
Patent No.
US 8,076,211
App. No.
12/912,829
Granted
Dec 13, 2011
Kind
B2
Abstract

A bipolar junction transistor may act as a select device for a semiconductor memory. The bipolar junction transistor may be formed of a stack of base and collector layers. Sets of parallel trenches are formed in a first direction down to the base and in a second direction down to the collector. The trenches may be used to form local enhancement implants into the exposed portion of the base and collector in each trench. As a result of the local enhancement implants, in some embodiments, leakage current may be reduced, active current capability may be higher, gain may be higher, base resistance may be reduced, breakdown voltage may be increased, and parasitic effects with adjacent junctions may be reduced.

Claims (13)

1. A method comprising:

forming stacked base and collector layers;

forming first trenches in a first direction to provide local enhancement implants for one of the base and collector layers; and

forming second trenches in a second direction, different than said first direction, to form local enhancement implants into the other of said base and collector layers.

2. The method of claim 1 including forming said first trenches to the lowermost of said stacked base and collector layers and forming the trenches in the second direction to the uppermost of said stacked base and collector layers.

3. The method of claim 1 including forming said first trenches into the collector.

4. The method of claim 3 including forming said second trenches into the base.

5. The method of claim 1 including filling said trenches in said first direction before forming said trenches in said second direction.

6. The method of claim 1 including forming said base of a first conductivity type and performing local enhancement implants for said base of said first conductivity type.

7. The method of claim 6 including forming said collector of a second conductivity type and performing said local enhancement implant for said collector of said second conductivity type.

8. The method of claim 1 including forming said first and second trenches to different depths.

9. The method of claim 1 including forming emitters and base contacts in regions between said trenches.

10. The method of claim 1 including forming said first trenches by forming a stack of base and collector layers covered by an insulator over said stack.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2011
From: NUMONYX B.V.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 027126/0176 →