IP Library › Granted Patent US 8,487,645
Granted Patent B2
US 8,487,645 · App. 12/929,881 · Granted Jul 16, 2013

Through silicon via testing structure

Inventors: Ming-Tung Chang (Hsinchu County, TW); Min-Hsiu Tsai (Zhubei, TW); Chih-Mou Tseng (Chiayi County, TW)
Assignee: Global Unichip Corporation
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Quick Facts
Patent No.
US 8,487,645
App. No.
12/929,881
Granted
Jul 16, 2013
Kind
B2
Abstract

A through-silicon via (TSV) testing structure is disclosed herein and includes a plurality of controllers, a plurality of transmitters and a plurality of receivers. The controllers are configured to output a first controlling signal and a second controlling signal. The transmitters are respectively connected to the output end of the through-silicon via and one of the controllers, and output a testing output signal in accordance with the first controlling signal and the second controlling signal. The receivers are respectively connected to the input end of the through-silicon via and another one of the controllers, and input a testing input signal in accordance with the first controlling signal and the second controlling signal.

Claims (30)

1. A through-silicon via testing structure, comprising:

a plurality of controllers, outputting a first controlling signal and a second controlling signal;

a plurality of transmitters, being respectively connected to a plurality of output ends of a through-silicon via and one of the plurality of controllers, and outputting a testing output signal in accordance with the first controlling signal and the second controlling signal; and

a plurality of receivers, being respectively connected to a plurality of input ends of the through-silicon via and another one of the plurality of controllers, and inputting a testing input signal in accordance with the first controlling signal and the second controlling signal.

2. The through-silicon via testing structure according to claim 1 , wherein outputs of a first controlling signal and a second controlling signal being controlled at a function mode, a first through-silicon via test mode 1 and a second through-silicon via test mode 2 via four output signals of the controller.

3. The through-silicon via testing structure according to claim 2 , wherein the transceiver comprises a From_fun, a chain input, a first controlling signal input, a second controlling signal input, a To TSV and a chain output.

4. The through-silicon via testing structure according to claim 3 , wherein the receiver comprises a From TSV, a chain input, a first controlling signal input, a second controlling signal input, a To_fun and a chain output.

5. The through-silicon via testing structure according to claim 4 , wherein the first controlling signal and the second controlling signal control a transceiver and a receiver at a functional path mode, a next element mode and a to TSV mode.

6. The through-silicon via testing structure according to claim 5 , wherein when the receiver being at a functional path mode, a data transmits from a From_fun to a To TSV.

7. The through-silicon via testing structure according to claim 6 , wherein when the receiver being at a functional path mode, a data transmits from a To TSV to a To_fun.

8. The through-silicon via testing structure according to claim 7 , wherein when the transceiver being at a next element mode, a data transmits from a chain output to a To TSV.

9. The through-silicon via testing structure according to claim 8 , wherein when the receiver being at a next element mode, the data transmits from a chain output to a From TSV.

10. The through-silicon via testing structure according to claim 9 , wherein when the transceiver being at a to TSV mode, a data transmits from a chain input to a To TSV.

11. The through-silicon via testing structure according to claim 10 , wherein when the receiver being at a to TSV mode, a data transmits from a chain input to a To TSV.

12. The through-silicon via testing structure according to claim 10 , wherein if an input testing signal of a receiver and an output testing signal of a transceiver being the same, there is no defect of through-silicon via.

13. A through-silicon via testing structure, comprising:

a plurality of controllers, outputting a first controlling signal and a second controlling signal;

a plurality of transmitters, being respectively connected to a plurality of output ends of a through-silicon via and one of the plurality of controllers, and outputting a testing output signal in accordance with the first controlling signal and the second controlling signal; and

a plurality of receivers, being respectively connected to a plurality input ends of the through-silicon via and another one of the plurality of controllers, and inputting a testing input signal in accordance with the first controlling signal and the second controlling signal; wherein a controller combining a plurality of transmitters and a plurality of receivers to form a first connection direction control module, and another of the plurality of controllers combining a plurality of transmitters and a plurality of receivers to form a second connection direction control module, the data being transmitted from the first connection direction control module or the second connection direction control module.

14. The through-silicon via testing structure according to claim 13 , wherein outputs of a first controlling signal and a second controlling signal being controlled at a function mode, a first through-silicon via test mode 1 and a second through-silicon via test mode 2 via four output signals of the controller.

15. The through-silicon via testing structure according to claim 14 , wherein the transceiver comprises a From_fun, a chain input, a first controlling signal input, a second controlling signal input, a To TSV and a chain output.

16. The through-silicon via testing structure according to claim 15 , wherein the receiver comprises a From TSV, a chain input, a first controlling signal input, a second controlling signal input, a To_fun and a chain output.

17. The through-silicon via testing structure according to claim 16 , wherein the first controlling signal and the second controlling signal control the transceiver and a receiver at a functional path mode, a next element mode and a to through-silicon via mode.

18. The through-silicon via testing structure according to claim 17 , wherein when the receiver being at a functional path mode, a data transmits from the From_fun to the To TSV.

19. The through-silicon via testing structure according to claim 18 , wherein when the receiver being at a functional path mode, a data transmits from a To TSV to a To_fun.

20. The through-silicon via testing structure according to claim 19 , wherein when a transceiver being at a next element mode, a data transmits from a chain output to a To TSV.

21. The through-silicon via testing structure according to claim 20 , wherein when the receiver being at a next element mode, a data transmits from a chain output to a From TSV.

22. The through-silicon via testing structure according to claim 21 , wherein when a transceiver is at a to TSV mode, the data transmits from a chain input to a To TSV.

23. The through-silicon via testing structure according to claim 22 , wherein when a receiver being at a to TSV mode, a data transmits from a chain input to a To TSV.

24. The through-silicon via testing structure according to claim 23 , wherein if an input testing signal of a receiver and an output testing signal of a transceiver being the same, there is no defect of through-silicon via.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2016
From: GLOBAL UNICHIP CORPORATION
To: GLOBAL UNICHIP CORPORATION; TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
Reel/Frame 038555/0838 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2011
From: CHANG, MING-TUNG; TSAI, MIN-HSIU
To: GLOBAL UNICHI CORPORATION
Reel/Frame 025886/0179 →
Priority Claims (1)
TW 99122911 A · Jul 13, 2010 · national
Continuity (1)
Related Publication 20120012841A1 · Jan 19, 2012