IP Library Granted Patent US 8,071,459
Granted Patent B2
US 8,071,459 · App. 12/936,113 · Granted Dec 6, 2011

Method of sealing an air gap in a layer of a semiconductor structure and semiconductor structure

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Quick Facts
Patent No.
US 8,071,459
App. No.
12/936,113
Granted
Dec 6, 2011
Kind
B2
Abstract

A method of sealing an air gap in a layer of a semiconductor structure comprises providing a first layer of the semiconductor structure having at least one air gap for providing isolation between at least two conductive lines formed in the first layer. The at least one air gap extends into the first layer from a first surface of the first layer. The method further comprises forming a barrier layer of a barrier dielectric material over the first surface of the first layer and the at least one air gap. The barrier dielectric material is selected to have a dielectric constant less than 3.5 and to provide a barrier to prevent chemicals entering the at least one air gap. In another embodiment, the at least one air gap extends from a first surface of the first layer to at least a portion of side surfaces of the at least two conductive lines to expose at least a portion of the side surfaces, and a barrier layer of a barrier dielectric material is formed over the exposed portions of the side surfaces of each of the at least two conductive lines.

Claims (65)

1. A method of sealing an air gap in a layer of a semiconductor structure, the method comprising:

providing a first layer of the semiconductor structure having at least one air gap for providing isolation between at least two conductive lines formed in the first layer, the at least one air gap extending into the first layer from a first surface of the first layer;

forming a first dielectric layer on the first surface of the first layer such that the first dielectric layer closes the at least one air gap;

forming a barrier layer of a first barrier dielectric material over the first dielectric layer by depositing conformally the barrier material over the first dielectric layer, the barrier layer having a thickness in the range of 1-10 nm and the first barrier dielectric material being selected to have a dielectric constant less than 3.5 and to provide a barrier to prevent chemicals entering the at least one air gap; and

forming, over the barrier layer, a second dielectric layer having at least one air gap for providing isolation between at least two conductive lines formed in the second dielectric layer.

2. A method of claim 1 , wherein the barrier material is a non-porous material.

3. A method of claim 1 , wherein the first barrier dielectric material is one of the following:

fluorine doped silicon dioxide;

carbon doped silicon dioxide;

organic polymeric dielectrics;

parylene;

amorphous carbon;

hydrogenated carbon (a-H:C);

fluorinated amorphous carbon (a-F:C)n.

4. A method of claim 1 , wherein the at least one air gap of the first layer extends to the at least two conductive lines to expose surfaces of the at least two conductive lines formed in the first layer, the method further comprising forming a second barrier layer of a second barrier dielectric material over the exposed surfaces of each of the at least two conductive lines.

5. A method of claim 4 , wherein the second barrier dielectric material is selected to have a dielectric constant less than 3.5 and to provide a barrier to prevent chemicals contacting the at least two conductive lines.

6. A method of claim 4 , wherein the second barrier dielectric material is a non-porous material.

7. A method of claim 4 , wherein the forming a second barrier layer comprises forming a barrier layer having a thickness in the range of 1-10 nm.

8. A method of sealing an air gap in a layer of a semiconductor structure, the method comprising:

providing a first layer of the semiconductor structure having at least one air gap for providing isolation between at least two conductive lines formed in the first layer, the at least one air gap extending into the first layer from a first surface of the first layer, and extending to the at least two conductive lines to expose surfaces of the at least two conductive lines;

forming a second barrier layer of a second barrier dielectric material over the exposed surfaces of each of the at least two conductive lines;

forming a dielectric layer on the first surface of the first layer such that the dielectric layer closes the at least one air gap, the second barrier layer between the at least two conductive lines and the dielectric layer;

forming a first barrier layer of a first barrier dielectric material over the dielectric layer by depositing conformally the first barrier material over the dielectric layer, the first barrier layer having a thickness in the range of 1-10 nm and the first barrier dielectric material being selected to have a dielectric constant less than 3.5 and to provide a barrier to prevent chemicals entering the at least one air gap; and

wherein the second barrier dielectric material is one of the following:

fluorine doped silicon dioxide;

carbon doped silicon dioxide;

organic polymeric dielectrics;

parylene;

amorphous carbon;

hydrogenated carbon (a-H:C);

fluorinated amorphous carbon (a-F:C)n.

9. A method of sealing an air gap in a layer of a semiconductor structure, the method comprising:

providing a first layer of the semiconductor structure having at least one air gap for providing isolation between at least two conductive lines formed in the first layer, the at least one air gap extending into the first layer from a first surface of the first layer, and extending to the at least two conductive lines to expose surfaces of the at least two conductive lines;

forming a second barrier layer of a second barrier dielectric material over the exposed surfaces of each of the at least two conductive lines;

forming a dielectric layer on the first surface of the first layer such that the dielectric layer closes the at least one air gap, the second barrier layer between the at least two conductive lines and the dielectric layer; and

forming a first barrier layer of a first barrier dielectric material over the dielectric layer by depositing conformally the first barrier dielectric material over the dielectric layer, the first barrier layer having a thickness in the range of 1-10 nm and the first barrier dielectric material being selected to have a dielectric constant less than 3.5 and to provide a barrier to prevent chemicals entering the at least one air gap,

wherein the first barrier dielectric material and the second barrier dielectric material are the same.

10. A method of claim 4 , wherein the providing a first layer comprises:

providing a second dielectric layer having at least two conductive lines in the first dielectric layer; and

forming the at least one air gap in the second dielectric layer extending from the first surface of the second dielectric layer into the second dielectric layer and extending to at least a portion of side surfaces of the at least two conductive lines to expose at least portions of the side surfaces, and

wherein the forming a second barrier layer comprises forming the second barrier layer on the exposed portions of the side surfaces of the at least two conductive lines through the at least one air gap.

11. A method of claim 10 , wherein the at least one air gap is defined by exposed surfaces of the second dielectric layer extending from the first surface and wherein the forming a second barrier layer further comprises forming the second barrier layer on the exposed surfaces of the first dielectric layer.

12. A method of claim 10 , wherein each of the at least two conductive lines have a top surface which is substantially in the same plane as the first surface of the second dielectric layer, wherein the forming a second barrier layer comprises forming the second barrier layer over at least a portion of the top surfaces of at least one of the at least two conductive lines.

13. A method of claim 1 , wherein the barrier dielectric material is one of the following:

fluorine doped silicon dioxide;

carbon doped silicon dioxide;

organic polymeric dielectrics;

parylene;

amorphous carbon;

hydrogenated carbon (a-H:C);

fluorinated amorphous carbon (a-F:C)n.

14. A method of claim 1 , wherein the at least one air gap extends to the at least two conductive lines to expose surfaces of the at least two conductive lines, the method further comprising forming a second barrier layer of a second barrier dielectric material over the exposed surfaces of each of the at least two conductive lines.

15. A method of claim 5 , wherein the forming a second barrier layer comprises forming a barrier layer having a thickness in the range of 1-10 nm.

16. A method of claim 1 , wherein the second barrier dielectric material is one of the following:

fluorine doped silicon dioxide;

carbon doped silicon dioxide;

organic polymeric dielectrics;

parylene;

amorphous carbon;

hydrogenated carbon (a-H:C);

fluorinated amorphous carbon (a-F:C)n.

17. A method of claim 9 , wherein the second barrier dielectric material is selected to have a dielectric constant less than 3.5 and to provide a barrier to prevent chemicals contacting the at least two conductive lines.

18. A method of claim 9 , wherein the second barrier dielectric material is a non-porous material.

19. A method of claim 9 , wherein the forming a second barrier layer comprises forming a barrier layer having a thickness in the range of 1-10 nm.

20. A method of claim 8 , wherein the second barrier dielectric material is selected to have a dielectric constant less than 3.5 and to provide a barrier to prevent chemicals contacting the at least two conductive lines.

Assignments (17)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0387 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0334 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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