Synchronization of stateful elements in a processing resource using a scan chain
View Patent ↗A processing resource apparatus comprises a reference processing module comprising a set of reference stateful elements and a target processing module comprising a set of target stateful elements. A scan chain having a first mode for supporting manufacture testing is also provided, the scan chain being arranged to couple the reference processing module to the target processing module. The scan chain also has a second mode capable of synchronizing the set of target stateful elements with the set of reference stateful elements in response to a synchronization signal.
1. A processing resource apparatus comprising:
one or more processor cores;
a scan chain comprising a first set of stateful elements and a second set of stateful elements;
a reference processing module to perform a first data processing operation based on state information stored at the first set of stateful elements;
a target processing module to perform a second data processing operation based upon state information stored at the second set of stateful elements;
a synchronization circuit to perform a synchronization operation, in a synchronization mode, the synchronization circuit comprising an enable input, in response to the enable input being asserted the synchronization circuit selectively couples an output of the first set of stateful elements to a scan input of the first set of stateful elements and to a scan input of the second set of stateful elements, and counting circuitry to control clocking the scan chain a predetermined number of times to synchronize the state information stored at the second set to the state information stored at the first set, wherein the first and second data processing operations are synchronized in response to the state information stored at the first and second sets being synchronized; and
a manufacturing testing circuit to perform a manufacturing test operation, in a testing mode, the manufacturing testing circuit comprising a test enable input, in response to the test enable input being asserted the manufacturing testing circuit selectively couples the scan input of the first set of stateful elements to a scan data input and couples the scan input of the second set of stateful elements to the scan data input.
2. The processing resource apparatus of claim 1 , wherein the enable input is asserted in response to detecting a synchronized application to be performed.
3. The processing resource apparatus of claim 2 , wherein the synchronized application is a handover of processing functions.
4. The processing resource apparatus of claim 1 , wherein the synchronization circuit further comprises a direction input, and the synchronisation circuit selectively couples the output of the first set of stateful elements to the scan input of the first set of stateful elements and to the scan input of the second set of stateful elements, and the counting circuitry controls clocking the scan further in response to the direction input being negated; and
in response to the enable signal being asserted and the direction input being asserted, the synchronization circuit is further to selectively couple an output of the second set of stateful elements to the scan input of the first set of stateful elements and to the scan input of the second set of stateful elements, and the counting circuitry controls clocking the scan chain the predetermined number of times to synchronize the state information stored at the first set to the state information stored at the second set.
5. A method, comprising:
performing, using one or more microprocessor cores, a first data processing operation in a reference processing module based on first state information stored at a first set of stateful elements of a scan chain;
performing a second data processing operation in a target processing module based on second state information stored at a second set of stateful elements of the scan chain;
in response to an enable input being asserted in a synchronization mode, coupling an output of the first set of stateful elements to a scan input of the first set of stateful elements and to a scan input of the second set of stateful elements, and clocking the scan chain a predetermined number of times to synchronize the second state information stored at the second set to the first state information stored at the first set;
wherein the first and second data processing operations are synchronized in response to the state information stored at the first and second sets being synchronized; and
in response to a test enable input being asserted in a testing mode, coupling the scan input of the first set of stateful elements to a scan data input and couples the scan input of the second set of stateful elements to the scan data input.
6. The method of claim 5 , further comprising:
asserting the enable input in response to detecting a synchronized application to be performed.
7. The method of claim 6 , wherein the synchronized application is a handover of processing functions.
8. The method of claim 5 , further comprising:
performing a manufacturing test operation using the scan chain.
9. The method of claim 5 , further comprising:
in response to the enable input being asserted and to a direction input being asserted, coupling an output of the second set of stateful elements to the scan input of the first set of stateful elements and to the scan input of the second set of stateful elements; and clocking the scan chain a predetermined number of times to synchronize the second state information stored at the second set to the first state information stored at the first set.
10. A processing resource apparatus comprising:
a scan chain comprising a first set of stateful elements and a second set of stateful elements;
a reference processing module to perform a first data processing operation based on state information stored at the first set of stateful elements;
a target processing module to perform a second data processing operation based upon state information stored at the second set of stateful elements;
a synchronization circuit to perform a synchronization operation, the synchronization circuit comprising an enable input and a direction input,
in response to the enable input being asserted and the direction input being negated the synchronization circuit selectively couples an output of the first set of stateful elements and to a scan input of the first set of stateful elements and to a scan input of the second set of stateful elements, and counting circuitry controls clocking the scan chain a predetermined number of times to synchronize the state information stored at the second set to the state information stored at the first set, and
in response to the enable input being asserted and the direction input being asserted the synchronization circuit selectively couples an output of the second set of stateful elements and to the scan input of the second set of stateful elements and to the scan input of the first set of stateful elements, wherein counting circuitry controls clocking the scan chain a predetermined number of times to synchronize the state information stored at the first set to the state information stored at the second set,
wherein the first and second data processing operations are synchronized in response to the state information stored at the first and second sets being synchronized.
11. The processing resource apparatus of claim 1 , wherein the enable input is asserted in response to detecting a synchronized application to be performed.
12. The processing resource apparatus of claim 2 , wherein the synchronized application is a handover of processing functions.