Compound semiconductor substrate, semiconductor device, and processes for producing them
A compound semiconductor substrate 10 according to the present invention is comprised of a Group III nitride and has a surface layer 12 containing a chloride of not less than 200×10 10 atoms/cm 2 and not more than 12000×10 10 atoms/cm 2 in terms of Cl and an oxide of not less than 3.0 at % and not more than 15.0 at % in terms of O, at a surface. The inventors conducted elaborate research and newly discovered that when the surface layer 12 at the surface of the compound semiconductor substrate 10 contained the chloride of not less than 200×10 10 atoms/cm 2 and not more than 12000×10 10 atoms/cm 2 in terms of Cl and the oxide of not less than 3.0 at % and not more than 15.0 at % in terms of O, Si was reduced at an interface between the compound semiconductor substrate 10 and an epitaxial layer 14 formed thereon and, as a result, the electric resistance at the interface was reduced.
1. A semiconductor device comprising:
a compound semiconductor substrate comprised of a Group III nitride and having a surface containing a chloride of not less than 200×10 10 atoms/cm 2 and not more than 12000×10 10 atoms/cm 2 in terms of Cl and an oxide of not less than 3.0 at % and not more than 15.0 at % in terms of O;
an epitaxial layer formed on the surface and comprised of a Group III nitride; and
an electrode formed on at least one of a top surface of the epitaxial layer and a bottom surface of the compound semiconductor substrate.
2. The semiconductor device according to claim 1 , wherein the surface contains the chloride of not less than 300×10 10 atoms/cm 2 and not more than 8000×10 10 atoms/cm 2 in terms of Cl.
3. The semiconductor device according to claim 1 , wherein the surface contains the oxide of not less than 5.0 at % and not more than 12.0 at % in terms of O.
4. The semiconductor device according to claim 1 , wherein a surface roughness (RMS) of the surface is not more than 3 nm.
5. The semiconductor device according to claim 1 , wherein a surface roughness (RMS) of the surface is not more than 1 nm.
6. The semiconductor device according to claim 1 , wherein the surface has a structure in which low dislocation density regions and high dislocation density regions are alternately arranged.
7. The semiconductor device according to claim 1 , wherein a plane direction of the surface is one of (0001) plane, (11-20) plane, (10-12) plane, (10-10) plane, (20-21) plane, (10-11) plane, (11-21) plane, (11-22) plane and (11-24) plane of a wurtzite structure.
8. The semiconductor device according to claim 1 , wherein the surface has an off-angle of not more than 15° relative to one of (0001) plane, (11-20) plane, (10-12) plane, (10-10) plane, (20-21) plane, (10-11) plane, (11-21) plane, (11-22) plane and (11-24) plane of a wurtzite structure.
9. A semiconductor device comprising:
a compound semiconductor substrate comprised of a Group III nitride;
an epitaxial layer formed on the compound semiconductor substrate; and
an electrode formed on at least one of a top surface of the epitaxial layer and a bottom surface of the compound semiconductor substrate, wherein
a concentration of Cl atoms at an interface between the compound semiconductor substrate and the epitaxial layer in the compound semiconductor substrate is not less than 5×10 15 atoms/cm 3 and not more than 1×10 18 atoms/cm 3 .
10. A semiconductor device comprising:
a compound semiconductor substrate comprised of a Group III nitride;
an epitaxial layer formed on the compound semiconductor substrate; and
an electrode formed on at least one of a top surface of the epitaxial layer and a bottom surface of the compound semiconductor substrate, wherein
a concentration of O atoms at an interface between the compound semiconductor substrate and the epitaxial layer in the compound semiconductor substrate is not less than 5×10 16 atoms/cm 3 and not more than 1×10 18 atoms/cm 3 .
11. A process for producing a semiconductor device, comprising:
a step of forming an epitaxial layer comprised of a Group III nitride on a surface of a compound semiconductor substrate comprised of a Group III nitride; and
a step of forming an electrode on at least one of a top surface of the epitaxial layer and a bottom surface of the compound semiconductor substrate, wherein
the surface contains a chloride of not less than 200×10 10 atoms/cm 2 and not more than 12000×1010 atoms/cm 2 in terms of Cl and an oxide of not less than 3.0 at % and not more than 15.0 at % in terms of O.
12. The process according to claim 11 , wherein the surface contains the chloride of not less than 300×10 10 atoms/cm 2 and not more than 8000×10 10 atoms/cm 2 in terms of Cl.
13. The process according to claim 11 , wherein the surface contains the oxide of not less than 5.0 at % and not more than 12.0 at % in terms of O.
14. The process according to claim 11 , wherein a surface roughness (RMS) of the surface is not more than 3 nm.
15. The process according to claim 11 , wherein a surface roughness (RMS) of the surface is not more than 1 nm.
16. The process according to claim 11 , wherein the surface has a structure in which low dislocation density regions and high dislocation density regions are alternately arranged.
17. The process according to claim 11 , wherein a plane direction of the surface is one of (0001) plane, (11-20) plane, (10-12) plane, (10-10) plane, (20-21) plane, (10-11) plane, (11-21) plane, (11-22) plane and (11-24) plane of a wurtzite structure.
18. The process according to claim 11 , wherein the surface has an off-angle of not more than 15° relative to one of (0001) plane, (11-20) plane, (10-12) plane, (10-10) plane, (20-21) plane, (10-11) plane, (11-21) plane, (11-22) plane and (11-24) plane of a wurtzite structure.
19. A process for producing a semiconductor device, comprising:
a step of forming an epitaxial layer on a compound semiconductor substrate comprised of a Group III nitride; and
a step of forming an electrode on at least one of a top surface of the epitaxial layer and a bottom surface of the compound semiconductor substrate, wherein
a concentration of Cl atoms at an interface between the compound semiconductor substrate and the epitaxial layer in the compound semiconductor substrate is not less than 5×10 15 atoms/cm 3 and not more than 1×10 18 atoms/cm 3 .
20. A process for producing a semiconductor device, comprising:
a step of forming an epitaxial layer on a compound semiconductor substrate comprised of a Group III nitride; and
a step of forming an electrode on at least one of a top surface of the epitaxial layer and a bottom surface of the compound semiconductor substrate, wherein
a concentration of O atoms at an interface between the compound semiconductor substrate and the epitaxial layer in the compound semiconductor substrate is not less than 5×10 16 atoms/cm 3 and not more than 1×10 18 atoms/cm 3 .