IP Library Granted Patent US 8,330,486
Granted Patent B2
US 8,330,486 · App. 12/956,416 · Granted Dec 11, 2012

Data line termination circuit

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Quick Facts
Patent No.
US 8,330,486
App. No.
12/956,416
Granted
Dec 11, 2012
Kind
B2
Abstract

A data line termination circuit includes a swing-width sensing unit configured to sense a swing width of a voltage of a data line and output a sensed signal, and a variable termination unit configured to adjust a termination resistance value of the data line in response to the sensed signal. The swing-width sensing unit can sense if the swing width is less than or greater than a predetermined swing width, and the swing width of the voltage of the data line can be reduced or increased to maintain the voltage of the data line within a predetermined range.

Claims (12)

1. A data line termination circuit comprising:

a swing-width sensing unit comprising:

a first comparator configured to compare a voltage of a data line with a first reference voltage;

a second comparator configured to compare the voltage of the data line with a second reference voltage;

a third comparator configured to compare the voltage of the data line with a third reference voltage; and

an encoder configured to encode outputs of the first to third comparators in order to output a sensed signal, wherein the swing-width sensing unit is configured to compare the voltage of the data line with each of the first to third reference voltages, and configured to output the sensed signal having a first logic level if the outputs of the comparing are the same logic levels, and configured to output the sensed signal having a second logic level if the outputs of the comparing are not the same logic levels; and

a variable termination unit configured to adjust a termination resistance value of the data line according to the sensed signal.

2. The data line termination circuit of claim 1 , wherein the encoder is configured to output the sensed signal such that the logic level is the first logic level if the outputs of each of the first to third comparators have the same logic levels, and configured to output the sensed signal having the second logic level if the outputs of the first to third comparators all do not have the same logic level.

3. The data line termination circuit of claim 1 , wherein the variable termination unit comprises:

a first termination unit configured to set a resistance value of the data line to a first termination resistance value according to the sensed signal; and

a second termination unit configured to set the resistance value of the data line to a second termination resistance value according to the sensed signal.

4. The data line termination circuit of claim 3 , wherein the variable termination unit further comprises a termination control unit which deactivates the first termination unit or the second termination unit in response to a termination control signal.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE IS HYNIX SEMICONDUCTOR INC. NOT HYNIX-SEMICONDUCTOR INC. THERE IS NO HYPHEN IN THE NAME. PREVIOUSLY RECORDED ON REEL 67328 FRAME 814. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 14, 2024
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067412/0482 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067369/0832 →
CHANGE OF NAME Recorded May 6, 2024
From: HYNIX-SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067328/0814 →