IP Library Granted Patent US 9,385,014
Granted Patent B2
US 9,385,014 · App. 12/962,479 · Granted Jul 5, 2016

Flip-chip package covered with tape

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Quick Facts
Patent No.
US 9,385,014
App. No.
12/962,479
Granted
Jul 5, 2016
Kind
B2
Abstract

A manufacturing method of a semiconductor device includes arranging a melted resin on a substrate, arranging a semiconductor chip on the melted resin, pressing the semiconductor chip and flip-chip mounting the semiconductor chip on the substrate, and hardening the melted resin with the melted resin being subjected to a fluid pressure and forming a resin portion.

Claims (12)

1. A semiconductor device comprising:

a first semiconductor chip that is flip-chip mounted on a front surface of a substrate;

a second semiconductor chip that is flip-chip mounted on a back surface of the substrate;

a fluid hardened void restrained resin portion configured in accordance with a fluid pressure, formed from a melted under fill, wherein the resin portion is formed between the first and second semiconductor chips and the substrate;

a resin sheet that covers the first and second semiconductor chips and the resin portion;

a plurality of openings formed within the resin sheet extending from a top surface of the resin sheet to a top surface of the first and second semiconductor chips, wherein the plurality of openings enable vacuum absorption of the first and second semiconductor chips;

a plurality of electrodes disposed on the front surface and the back surface of the substrate; and

the first semiconductor chip and the second semiconductor chip are affixed to the substrate via the plurality of electrodes through a plurality of openings in the resin portion.

2. The device of claim 1 wherein the resin sheet has portions that are parallel with the top surface of the substrate and portions that are inclined formed between the portions that are parallel with the top surface of the substrate.

3. The device of claim 1 wherein a resin under fill is formed underneath the resin sheet, on the sides of the first and second semiconductor chips and underneath the bottom of the first and second semiconductor chips.

4. The device of claim 1 wherein a first solder ball is disposed on the front surface of the substrate and wherein the first solder ball is located outside of the resin sheet on a surface area void of conductive traces.

5. The device of claim 1 wherein a second solder ball is disposed on the back surface of the substrate and wherein the second solder ball is located outside of the resin sheet on a surface area void of conductive traces.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036645/0734 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2015
From: MASUDA, NAOMI
To: SPANSION, LLC
Reel/Frame 036604/0639 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
SECURITY AGREEMENT Recorded Aug 23, 2012
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 028837/0076 →