Semiconductor device
View Patent ↗A semiconductor device may include, but is not limited to: a semiconductor substrate having an element formation region and a dicing region; an element layer over the element formation region and the dicing region; and a multi-layered wiring structure over the dicing region. The multi-layered wiring structure extends upwardly from the element layer. The multi-layered wiring structure has a groove penetrating the multi-layered wiring structure.
1. A semiconductor device comprising:
a semiconductor substrate having an element formation region and a dicing region;
an element layer over the element formation region and the dicing region; and
a multi-layered wiring structure over the dicing region, the multi-layered wiring structure extending upwardly from the element layer,
the multi-layered wiring structure having a first groove penetrating the multi-layered wiring structure,
the multi-layered wiring structure having a top wiring, wherein side regions of the top wiring are exposed by the first groove.
2. The semiconductor device according to claim 1 , wherein a bottom surface of the first groove is positioned in the element layer.
3. The semiconductor device according to claim 1 , wherein the multi-layered wiring structure comprises first and second wiring portions separated by the first groove, wherein the multi-layered wiring structure comprises a second groove, wherein a depth of the first groove is larger than a depth of the second groove, and wherein each depth of the first and second grooves is measured from a top surface of the multi-layered wiring structure to a far end of the first and second grooves.
4. The semiconductor device according to claim 1 , wherein the multi-layered wiring structure comprises a low-k film, wherein the low-k film includes a Silicon, a Carbon and an Oxygen.
5. The semiconductor device according to claim 1 , wherein the top wiring comprising an aluminum film.
6. A semiconductor device comprising:
a semiconductor substrate having an element formation region and a dicing region;
a film at least formed over the dicing region;
a first groove formed in the film over the dicing region;
a second groove formed in the film over the dicing region positioned between the element formation region and the first groove, a depth of the second groove being larger than a depth of the first groove, and each depth of the first and second grooves being measured from a top surface of the film to a far end of the first and second grooves.
7. The semiconductor device according to claim 6 , further comprising an element layer over the element formation region and the dicing region, and wherein a bottom surface of the first groove is positioned in the element layer.
8. The semiconductor device according to claim 7 , wherein the film comprises a first insulating film over the element layer, a second insulating film over the first insulating film, a first wiring and a second wiring separated by the first groove, and the first wiring and the second wiring extend upwardly from the second insulating film over the dicing region.
9. The semiconductor device according to claim 8 , further comprising:
a third wiring over the dicing region, the third wiring extending upwardly from the second insulating film, the third wiring being closer to the element formation region than the second wiring.
10. The semiconductor device according to claim 9 , wherein:
a first distance between the first and second wiring being smaller than a second distance between the second and third wiring.
11. The semiconductor device according to claim 9 , further comprising:
a third insulating film covering at least upper and side surfaces of the third wiring.
12. The semiconductor device according to claim 11 , wherein a thickness of the third insulating film is 0.5 times or more the vertical size of the second wiring.
13. The semiconductor device according to claim 8 , further comprising:
a fourth wiring over the element formation region, the fourth wiring extending upwardly from the second insulating film,
a fifth wiring over the element formation region, the fifth wiring extending upwardly from the second insulating film.
14. The semiconductor device according to claim 13 , wherein an upper surface of the fourth wiring is exposed.
15. The semiconductor device according to claim 13 , wherein the first, second, third, fourth, and fifth wirings comprise an aluminum film.
16. The semiconductor device according to claim 8 , wherein the first insulting film comprises a Silicon, a Carbon and an Oxygen.
17. The semiconductor device according to claim 8 , wherein the first and second wiring have substantially the same vertical size.
18. The semiconductor device according to claim 8 , wherein each of the horizontal sizes of the first and second wiring is 0.5 times or more the vertical size of the second wiring.
19. The semiconductor device according to claim 8 , wherein side regions of the first wiring and the second wiring are exposed.
20. The semiconductor device according to claim 8 , wherein the first insulating film has a dielectric constant smaller than 3.9.