IP Library Granted Patent US 8,693,707
Granted Patent B2
US 8,693,707 · App. 12/972,317 · Granted Apr 8, 2014

Signal processing circuit

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,693,707
App. No.
12/972,317
Granted
Apr 8, 2014
Kind
B2
Abstract

A signal processing circuit includes: an AD converter configured to quantize an input signal, whose amplitude changes in accordance with temperature, within a set voltage range and convert the quantized input signal into a digital signal; and a setting circuit configured to set the voltage range so as to be wider when the input signal is greater in amplitude in accordance with the temperature and so as to be narrower when the input signal is smaller in amplitude in accordance with the temperature.

Claims (25)

1. A signal processing circuit comprising:

an AD converter configured to quantize an input signal, whose amplitude changes in accordance with temperature, within a set voltage range and convert the input signal into a digital signal;

a setting circuit configured to set the voltage range so as to be wider when the input signal is greater in amplitude in accordance with the temperature and so as to be narrower when the input signal is smaller in amplitude in accordance with the temperature;

an audio signal output circuit configured to output an audio signal corresponding to a capacitance value of a capacitor whose capacitance value changes in accordance with audio and temperature; and

a low pass filter configured to suppress a high frequency component of the audio signal and output the audio signal to the AD converter as the input signal.

2. The signal processing circuit of claim 1 , wherein

in the AD converter, the voltage range is set based on the level of an input reference voltage, and wherein

the setting circuit includes a reference voltage circuit configured to generate the reference voltage for setting the voltage range so as to be wider when the input signal is greater in amplitude in accordance with the temperature and so as to be narrower when the input signal is smaller in amplitude in accordance with the temperature.

3. The signal processing circuit of claim 2 , wherein

the reference voltage circuit generates the reference voltage for setting the voltage range such that the input signal falls within the voltage range.

4. The signal processing circuit of claim 2 , wherein the AD converter is a delta-sigma AD converter including:

an integrating circuit configured to integrate an input signal;

a quantizing circuit configured to quantize an output of the integrating circuit and output the digital signal;

a DA converter configured to output the reference voltage based on the digital signal; and

an adding circuit configured to add a voltage corresponding to the input signal and a voltage corresponding to the reference voltage to output an added result to the integrating circuit.

5. The signal processing circuit of claim 3 , wherein

The AD converter is a delta-sigma AD converter including:

an integrating circuit configured to integrate an input signal;

a quantizing circuit configured to quantize an output of the integrating circuit and output the digital signal;

a DA converter configured to output the reference voltage based on the digital signal; and

an adding circuit configured to add a voltage corresponding to the input signal and a voltage corresponding to the reference voltage to output an added result to the integrating circuit.

6. A signal processing circuit comprising:

an AD converter configured to quantize an input signal within a set voltage range and convert the input signal into a digital signal;

a setting circuit configured to set the voltage range so as to be wider when the input signal is greater in amplitude in accordance with the temperature and so as to be narrower when the input signal is smaller in amplitude in accordance with the temperature; and

an audio signal output circuit configured to output an audio signal to the AD converter as the input signal, the audio signal corresponding to a capacitance value of a capacitor whose capacitance value changes in accordance with audio and temperature.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2014
From: SANYO SEMICONDUCTOR CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032022/0269 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 8, 2011
From: ONISHI, AKINOBU
To: SANYO ELECTRIC CO., LTD.; SANYO SEMICONDUCTOR CO., LTD.
Reel/Frame 025771/0786 →