Method of manufacturing semiconductor device
View Patent ↗The invention provides a method of manufacturing a semiconductor device at low cost in which the gate insulation film having a trench structure is not damaged by arsenic ions when the emitter layer or the like is formed and the insulation breakdown voltage is enhanced. A gate electrode made of polysilicon formed in a trench is thermally oxidized in a high temperature furnace or the like to form a thick polysilicon thermal oxide film on the gate electrode. Impurity ions are then ion-implanted to form an N type semiconductor layer that is to be an emitter layer or the like. At this time, the polysilicon thermal oxide film is formed thicker than the projected range Rp of impurity ions in the silicon oxide film for forming the N type semiconductor layer as the emitter layer or the like by ion implantation. This prevents a gate insulation film between the gate electrode and the N type semiconductor layer from being damaged by the impurity ions.
1. A method of manufacturing a semiconductor device, comprising:
providing a semiconductor substrate comprising a first semiconductor layer of a first general conductive type and a second semiconductor layer of a second general conductive type disposed on the first semiconductor layer;
forming a trench extending from a front surface of the second semiconductor layer into the first semiconductor layer;
forming a gate insulation film on an inner sidewall of the trench and the front surface of the second semiconductor layer;
forming a gate electrode in the trench after the formation of the gate insulation film;
forming a gate electrode protection film on an upper surface of the gate electrode by thermally oxidizing the gate electrode; and
forming an impurity region of the first general conductive type by ion-implanting impurity ions in the second semiconductor layer after the formation of the gate electrode protection film,
wherein a thermal oxide film is formed on the upper surface of the second semiconductor layer so as to overlap the gate insulation film during the formation of the gate electrode protection film, a thickness of the gate electrode protection film is larger than a projected range of the impurity ions in the gate electrode protection film during the formation of the impurity region, and a total thickness of the overlapped gate insulation film and thermal oxide film is less than 70% of the projected range of the impurity ions in the gate electrode protection film.
2. The method of claim 1 , wherein an upper surface of the gate electrode protection film is lower than the upper surface of the second semiconductor layer.
3. The method of claim 1 , wherein the gate insulation film between the gate electrode and the second semiconductor layer is thicker at an uppermost surface of the gate electrode than at a lower part of the gate electrode.
4. The method of claim 3 , wherein the uppermost surface of the gate electrode adjacent the second semiconductor layer has a mountain shape which has a maximum height away from the gate insulation film so that a height thereof decreases toward a center portion of the trench, and a thickness of the gate insulation film between the second semiconductor layer and the gate electrode gradually increases toward the uppermost surface of the gate electrode.
5. A method of manufacturing a semiconductor device, comprising
providing a semiconductor substrate comprising a first semiconductor layer of a first general conductive type and a second semiconductor layer of a second general conductive type disposed on the first semiconductor layer;
forming a trench extending from a front surface of the second semiconductor layer into the first semiconductor layer;
forming a gate insulation film on an inner sidewall of the trench and the front surface of the second semiconductor layer;
forming a gate electrode in the trench after the formation of the gate insulation film;
forming a gate electrode protection film on an upper surface of the gate electrode by thermally oxidizing the gate electrode;
forming an impurity region of the first general conductive type by ion-implanting impurity ions in the second semiconductor layer after the formation of the gate electrode protection film; and
removing the gate insulation film from the front surface of the second semiconductor layer after the formation of the gate electrode and before the formation of the gate electrode protection film.