Method and apparatus for supporting storage modules in standard memory and/or hybrid memory bus architectures
View Patent ↗A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.
1. A memory module, comprising:
a circuit board;
a plurality of non-volatile memory devices coupled to at least one side of the circuit board;
a first connector, operationally coupled to a host memory bus and providing power to the plurality of non-volatile memory devices;
a second connector, distinct from the first connector, operationally coupled to a secondary controller different from a primary host controller for the host memory bus; and
a power supply adapted to obtain a first voltage from the first connector and convert the first voltage to a second voltage to power the plurality of non-volatile memory devices, wherein a level for the second voltage is adaptable by using different daughter cards.
2. The memory module of claim 1 , wherein the first connector is a card edge interface adapted to couple to a socket for the host memory bus.
3. The memory module of claim 2 , wherein the second connector is a socket adapted to receive a cable connector.
4. The memory module of claim 1 , wherein the memory module is accessible via the secondary controller while volatile memory modules coupled to the host memory bus are concurrently accessible via the host memory bus.
5. The memory module of claim 1 , wherein the second connector carries data traffic to and from the plurality non-volatile memory devices.
6. The memory module of claim 1 , wherein the second connector provides at least one serial communication path for accessing the plurality of non-volatile memory devices.
7. The memory module of claim 1 , wherein the second connector provides:
a first serial communication path for receiving data for the plurality of non-volatile memory devices; and
a second serial communication path for transmission of data from the plurality of non-volatile memory devices.
8. The memory module of claim 1 , wherein the primary host controller is a double-data-rate three (DDR3)-compatible memory controller and the secondary controller is a Serial Advanced Technology Attachment (SATA)-compatible controller.
9. The memory module of claim 1 , wherein the primary host controller is a double-data-rate three (DDR3)-compatible memory controller and the secondary controller is a Serial Attached Small Computer System Interface (SAS)-compatible controller.
10. The memory module of claim 1 , further comprising:
a solid state drive controller coupled to the second connector and the plurality of non-volatile memory devices, the solid state drive controller adapted to facilitate communications to and from the plurality of non-volatile memory devices over the second connector.
11. The memory module of claim 1 , wherein the power supply is provided at least partially on a removable daughter card that couples to the memory module.
12. The memory module of claim 1 , further comprising:
a thermal sensor adapted to obtain a temperature for the memory module and send an event signal via the first connector if the temperature exceeds a threshold.
13. The memory module of claim 1 , wherein the memory module has a height, width, and length dimensions that comply with a specification for all memory modules to be coupled to the host memory bus.
14. The memory module of claim 1 , further comprising:
a read-only memory device for storing information identifying the memory module, wherein the memory module is adapted to provide such information through the first connector to the host memory bus.
15. The memory module of claim 1 , wherein the memory module is adapted to selectively send and receive data traffic for the plurality non-volatile memory devices through the second connector or the first connector, depending on which of the two connectors is coupled to a communication path compatible with data transmissions and reception of the memory module.
16. The memory module of claim 15 , wherein the communication path is a differential pair that carry the data traffic in series.
17. A memory module, comprising:
a circuit board;
a plurality of non-volatile memory devices coupled to at least one side of the circuit board;
a first connector, operationally coupled to a host memory bus and providing power to the plurality of non-volatile memory devices; and
a second connector, distinct from the first connector, operationally coupled to a secondary controller different from a primary host controller for the host memory bus; wherein the memory module is adapted to selectively send and receive data traffic for the plurality non-volatile memory devices through the second connector or the first connector, depending on which of the two connectors is coupled to a communication path compatible with data transmissions and reception of the memory module, and when the first connector is used for data traffic by the memory module, at least one pair of differential clock pairs of the host memory bus are repurposed for transmission of the data traffic.
18. A non-volatile memory module, comprising:
a circuit board;
a plurality of non-volatile memory devices coupled to at least one side of the circuit board; and
a bus interface for coupling the non-volatile memory module to a host memory bus that concurrently supports a volatile memory module,
wherein the bus interface for the non-volatile memory module uses an unshared differential pair of electrical paths over the host memory bus for data traffic while the volatile memory module uses electrical paths on the host memory bus that are shared among a plurality of volatile memory modules for data traffic,
wherein the unshared differential pair of electrical paths are a repurposed differential clock pair from the host memory bus.
19. The non-volatile memory module of claim 18 , wherein the host memory bus has a first data throughput capacity for data traffic to the volatile memory module, and repurposing the differential clock pair for data traffic for the non-volatile memory module effectively increases the data throughput capacity of the host memory bus to a second data throughput capacity.
20. The non-volatile memory module of claim 18 , wherein concurrent support of the volatile memory module includes providing simultaneous access to the non-volatile memory module and the volatile memory module over the host memory bus.
21. The non-volatile memory module of claim 18 , further comprising:
a solid state drive controller coupled to the plurality of non-volatile memory devices, the solid state drive controller adapted to facilitate communications to and from the plurality of non-volatile memory devices over the bus interface.
22. The non-volatile memory module of claim 18 , wherein the host memory bus provides power to the plurality of non-volatile memory devices through the bus interface, and further comprising:
a second interface for coupling to a secondary controller different from a primary host controller for the host memory bus.
23. The non-volatile memory module of claim 22 , wherein the non-volatile memory module is adapted to selectively send and receive data traffic for the plurality non-volatile memory devices through the second interface or the bus interface, depending on which of the two interfaces is coupled to a communication path compatible with data transmissions and reception of the non-volatile memory module.
24. The non-volatile memory module of claim 18 , further comprising:
one or more sockets coupled to the circuit board, the one or more sockets for accepting a daughter card adapted to convert a first voltage obtained from the host memory bus to a second voltage used by the plurality of non-volatile memory devices.