IP Library Granted Patent US 8,625,362
Granted Patent B2
US 8,625,362 · App. 12/980,257 · Granted Jan 7, 2014

Data sensing device non-volatile memory

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Quick Facts
Patent No.
US 8,625,362
App. No.
12/980,257
Granted
Jan 7, 2014
Kind
B2
Abstract

A non-volatile memory device for measuring a read current of a unit cell is provided. The non-volatile memory device includes a unit cell configured to read or write data, a column switching unit configured to select the unit cell in response to a column selection signal, a sense amplifier controlled by a sense-amplifier enable signal, configured to sense and amplify data that is received from the unit cell through the column switching unit, a first latch unit configured to latch the sense-amplifier enable signal for a predetermined time when a test code signal received from an external part is activated, a column controller configured to output a latch control signal in response to a combination of a column switch-off signal and a column control signal, and a second latch unit configured to control whether or not the column selection signal is latched in response to an activation state of the latch control signal.

Claims (39)

1. A data sensing device of a non-volatile memory, the device comprising:

a unit cell configured to store data;

a column switching unit configured to select the unit cell in response to a column selection signal;

a column controller configured to output a latch control signal in response to a column switch-off signal and a column control signal; and

a second latch unit configured to latch the column selection signal in response to the latch control signal and a test code signal,

wherein, when the test code signal is activated and the latch control signal is activated, the column selection signal is latched and output, and

wherein, when the latch control signal is deactivated, the column selection signal is deactivated.

2. The data sensing device according to claim 1 , further comprising:

a first latch unit configured to latch a sense-amplifier enable signal for a predetermined time when the test code signal received from an external part is activated; and

a sense amplifier controlled by the sense-amplifier enable signal, configured to sense and amplify data provided from the unit cell through the column switching unit.

3. The data sensing device according to claim 2 , wherein:

a first current, that is read from an output signal of the sense amplifier during a specific period in which the sense-amplifier enable signal is latched, is sensed; and

a second current, that is read from the output signal of the sense amplifier under a condition that the column switching unit is turned off during the specific period in which the sense-amplifier enable signal is latched, is sensed.

4. The data sensing device according to claim 3 , wherein a read current of the unit cell is measured using a value obtained when the second current is subtracted from the first current.

5. The data sensing device according to claim 2 , further comprising:

a test controller configured to output a read control signal, upon receiving a sensing control signal, the test code signal, and an output signal of the first latch unit; and

a read signal controller configured to control an activation timing point of the sense-amplifier enable signal in response to the read control signal.

6. The data sensing device according to claim 5 , further comprising:

a precharge unit configured to control a precharge operation of the sense-amplifier enable signal upon receiving a precharge signal from the read signal controller.

7. The data sensing device according to claim 6 , further comprising:

a clamping unit configured to control an activation state of the sense-amplifier enable signal upon receiving a clamping signal from the read signal controller.

8. The data sensing device according to claim 7 , wherein the clamping unit comprises:

an NMOS transistor that is coupled between the sense amplifier and the column switching unit and receives the clamping signal from the read signal controller through a gate terminal.

9. The data sensing device according to claim 6 , wherein the precharge unit comprises:

a PMOS transistor that is coupled between a voltage terminal and the sense amplifier and receives the precharge signal from the read signal controller through a gate terminal.

10. The data sensing device according to claim 5 , wherein:

when the test code signal is activated, the read control signal is latched according to an output signal of the first latch unit, and

when the test code signal is activated, the read control signal is operated according to the sensing control signal.

11. The data sensing device according to claim 5 , wherein:

a first current, that is read from an output signal of the sense amplifier during a specific period in which the sense-amplifier enable signal is latched, is sensed; and

a second current, that is read from an output signal of the sense amplifier under a condition that the column switching unit is turned off during the specific period in which the sense-amplifier enable signal is latched, is sensed.

12. The data sensing device according to claim 11 , wherein a read current of the unit cell is measured using a value obtained when the second current is subtracted from the first current.

13. The data sensing device according to claim 5 , wherein:

when each of the column switch-off signal and the column control signal is activated, the latch control signal is deactivated; and

when the column switch-off signal is deactivated and the column control signal is activated, the column controller activates and outputs the latch control signal.

14. The data sensing device according to claim 5 , wherein the test code signal is received from an external part.

15. The data sensing device according to claim 1 , wherein:

when each of the column switch-off signal and the column control signal is activated, the latch control signal is deactivated.

16. The data sensing device according to claim 1 , wherein the column controller is configured to activate and output the latch control signal when the column switch-off signal is deactivated and the column control signal is activated.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE IS HYNIX SEMICONDUCTOR INC. NOT HYNIX-SEMICONDUCTOR INC. THERE IS NO HYPHEN IN THE NAME. PREVIOUSLY RECORDED ON REEL 67328 FRAME 814. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 14, 2024
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067412/0482 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067369/0832 →
CHANGE OF NAME Recorded May 6, 2024
From: HYNIX-SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067328/0814 →