IP Library Granted Patent US 8,398,304
Granted Patent B2
US 8,398,304 · App. 12/985,133 · Granted Mar 19, 2013

Multiple sensor thermal management for electronic devices

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Quick Facts
Patent No.
US 8,398,304
App. No.
12/985,133
Granted
Mar 19, 2013
Kind
B2
Abstract

A device includes a current source circuit to separately provide a first current and a second current and a thermal detection device coupleable to the output of the current source circuit. The device further includes a voltage detection circuit to provide a first indicator of a first voltage representative of a voltage at the thermal detection device in response to the second current and a second indicator of a second voltage representative of a voltage difference between the voltage at the thermal detection device in response to the second current and a voltage at the voltage detection device in response to the first current. The device further includes a temperature detection circuit to provide an over-temperature indicator based on the first indicator and the second indicator, wherein an operation of a circuit component of the device can be adjusted based on the over-temperature indicator.

Claims (66)

1. A device comprising:

a current source circuit having an output to separately provide a first current and a second current;

a first thermal detection device disposed at a first location of the device, the first thermal detection device coupleable to the output of the current source circuit;

a voltage detection circuit comprising an input coupleable to the first thermal detection device and an output to provide:

a first indicator of a first voltage representative of a voltage at the first thermal detection device in response to the second current; and

a second indicator of a second voltage representative of a voltage difference between the voltage at the first thermal detection device in response to the second current and a voltage at the first thermal detection device in response to the first current; and

a temperature detection circuit having an input coupled to the output of the voltage detection circuit and an output to provide a first over-temperature indicator based on the first indicator and the second indicator.

2. The device of claim 1 , wherein the temperature detection circuit is configured to:

provide a first state of the first over-temperature indicator in response to the second voltage being greater than the first voltage; and

provide a second state of the first over-temperature indicator in response to the second voltage being less than the first voltage.

3. The device of claim 1 , wherein the voltage detection circuit comprises at least one of:

an attenuation circuit having an input to receive the voltage at the first thermal detection device in response to the second current and an output to provide the first voltage, wherein an attenuation factor of the attenuation circuit is programmable; and

an amplification circuit having an input to receive the voltage difference and an output to provide the second voltage, wherein a gain factor of the amplification circuit is programmable.

4. The device of claim 1 , wherein an operation of a first circuit component of the device is enabled or disabled based on the first over-temperature indicator.

5. The device of claim 1 , wherein the device comprises an integrated circuit comprising the current source circuit, the first thermal detection device, the voltage detection circuit, and the temperature detection circuit.

6. The device of claim 1 , further comprising:

a second thermal detection device disposed at a second location of the device, the second thermal detection device coupleable to the output of the current source circuit; and

wherein the input of the voltage detection circuit is coupleable to the second thermal detection device;

wherein the output of the voltage detection circuit further is to provide:

a third indicator of a third voltage representative of a voltage at the second thermal detection device in response to the second current; and

a fourth indicator of a fourth voltage representative of a difference between a voltage at the second thermal detection device in response to the second current and a voltage at the second thermal detection device in response to the first current; and

wherein the output of the over-temperature detection circuit further is to provide a second over-temperature indicator based on the third indicator and the fourth indicator.

7. The device of claim 6 , wherein an operation of a second circuit component of the device is enabled or disabled based on the second over-temperature indicator.

8. The device of claim 1 , wherein the voltage detection circuit comprises:

a capacitive element having a first electrode and a second electrode, the first electrode coupleable to the first electrode of the first thermal detection device;

a transistor having a control electrode, a first current electrode coupled to the second electrode of the capacitive element and a second current electrode coupled to a first voltage reference; and

wherein the transistor is configured to be enabled when the current source circuit provides the first current and disabled when the current source provides the second current.

9. The device of claim 8 , wherein the temperature detection circuit comprises:

a comparator circuit having a first input coupled to the first electrode of the capacitive element, a second input coupled to the second electrode of the capacitive element, and an output to provide an output voltage based on a comparison of a third voltage to a fourth voltage, wherein the output voltage is representative of the first over-temperature indicator.

10. The device of claim 1 , wherein the first thermal detection device comprises a p-n junction.

11. The device of claim 10 , wherein:

the p-n junction comprises a p-type region coupleable to the current source circuit via a first interconnect and a second interconnect and an n-type region coupleable to the current source circuit via a third interconnect, wherein a resistance of the third interconnect is substantially equal to a resistance of the second interconnect;

the current source circuit is configured to provide the first current to the p-type region via both the first electrode and the second electrode concurrent with a third current provided to the n-type region via the third electrode, wherein the third current is substantially equal to a current at the second electrode; and

the temperature detection circuit is coupleable to the second interconnect and the third interconnect, wherein the temperature detection circuit is configured to determine the first voltage and the second voltage via the second interconnect and the third interconnect.

12. A device comprising:

a first thermal detection device disposed at a first location of the device to receive a first current and a second current;

a voltage detection circuit comprising an input coupleable to the first thermal detection device and an output to provide:

a first indicator of a first voltage representative of a voltage at the first thermal detection device in response to the second current; and

a second indicator of a second voltage representative of a voltage difference between the voltage at the first thermal detection device in response to the second current and a voltage at the first thermal detection device in response to the first current; and

a temperature detection circuit having an input coupled to the output of the voltage detection circuit and an output to provide a first over-temperature indicator based on the first indicator and the second indicator.

13. The device of claim 12 , wherein the temperature detection circuit is configured to:

provide a first state of the first over-temperature indicator in response to the second voltage being greater than the first voltage; and

provide a second state of the first over-temperature indicator in response to the second voltage being less than the first voltage.

14. The device of claim 12 , wherein the voltage detection circuit comprises at least one of:

an attenuation circuit having an input to receive the voltage at the first thermal detection device in response to the second current and an output to provide the first voltage, wherein an attenuation factor of the attenuation circuit is programmable; and

an amplification circuit having an input to receive the voltage difference and an output to provide the second voltage, wherein a gain factor of the amplification circuit is programmable.

15. The device of claim 12 , wherein an operation of a first circuit component of the device is enabled or disabled based on the first over-temperature indicator.

16. The device of claim 12 , wherein the voltage detection circuit comprises:

a capacitive element having a first electrode and a second electrode, the first electrode coupleable to the first electrode of the first thermal detection device;

a transistor having a control electrode, a first current electrode coupled to the second electrode of the capacitive element and a second current electrode coupled to a first voltage reference; and

wherein the transistor is configured to be enabled when a current source circuit provides the first current and disabled when the current source provides the second current.

17. The device of claim 16 , wherein the temperature detection circuit comprises:

a comparator circuit having a first input coupled to the first electrode of the capacitive element, a second input coupled to the second electrode of the capacitive element, and an output to provide an output voltage based on a comparison of a third voltage to a fourth voltage, wherein the output voltage is representative of the first over-temperature indicator.

18. The device of claim 12 , wherein the first thermal detection device comprises a p-n junction.

19. The device of claim 18 , wherein:

the p-n junction comprises a p-type region coupleable to a current source circuit via a first interconnect and a second interconnect and an n-type region coupleable to the current source circuit via a third interconnect, wherein a resistance of the third interconnect is substantially equal to a resistance of the second interconnect;

the current source circuit is configured to provide the first current to the p-type region via both the first electrode and the second electrode concurrent with a third current provided to the n-type region via the third electrode, wherein the third current is substantially equal to a current at the second electrode; and

the temperature detection circuit is coupleable to the second interconnect and the third interconnect, wherein the temperature detection circuit is configured to determine the first voltage and the second voltage via the second interconnect and the third interconnect.

20. A device comprising:

a current source circuit having an output to separately provide a first current and a second current;

a first thermal detection device disposed at a first location of the device, the first thermal detection device coupleable to the output of the current source circuit;

a voltage detection circuit comprising an input coupleable to the first thermal detection device and an output to provide:

a first indicator of a first voltage representative of a voltage at the first thermal detection device in response to the second current; and

a second indicator of a second voltage representative of a voltage difference between the voltage at the first thermal detection device in response to the second current and a voltage at the first thermal detection device in response to the first current;

a temperature detection circuit having an input coupled to the output of the voltage detection circuit and an output to provide a first over-temperature indicator based on the first indicator and the second indicator; and

an attenuation circuit having an input to receive the voltage at the first thermal detection device in response to the second current and an output to provide the first voltage, wherein an attenuation factor of the attenuation circuit is programmable.

Assignments (26)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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From: FREESCALE SEMICONDUCTOR INC.
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To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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