IP Library Granted Patent US 8,319,550
Granted Patent B2
US 8,319,550 · App. 13/008,352 · Granted Nov 27, 2012

Switched-capacitor programmable-gain amplifier

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Quick Facts
Patent No.
US 8,319,550
App. No.
13/008,352
Granted
Nov 27, 2012
Kind
B2
Abstract

A programmable-gain amplifier has a first input node coupled to receive a first input signal and a control input coupled to receive a gain select signal. The programmable-gain amplifier includes a differential amplifier having a first input and a first output and a plurality of capacitors. A first terminal of each of the plurality of capacitors is coupled to the first input of the differential amplifier, and a second terminal of each of the plurality of capacitors is coupled to the first input node during a sampling phase of the programmable-gain amplifier and selectively coupled to the first output of the differential amplifier, based on the gain select signal, during a gain phase of the programmable-gain amplifier.

Claims (64)

1. A method of operating a programmable-gain amplifier which has a plurality of capacitors, an attenuation capacitor, and a differential amplifier, wherein a first terminal of each of the plurality of capacitors is coupled to a minus input of the differential amplifier, the method comprising:

receiving a gain select signal which indicates a selected subset of capacitors of the plurality of capacitors and an unselected subset of capacitors of the plurality of capacitors, wherein the selected subset includes at least one capacitor of the plurality of capacitors, and wherein the selected subset and the unselected subset are mutually exclusive;

during a sampling phase of the programmable-gain amplifier:

coupling a first input signal to a second terminal of each of the plurality of capacitors, wherein each of the plurality of capacitors are coupled in parallel with each other;

during a gain phase of the programmable-gain amplifier:

coupling the second terminal of each capacitor of the selected subset of capacitors indicated by the gain select signal to a plus output of the differential amplifier; and

when the unselected subset of capacitors includes at least one capacitor, coupling the second terminal of each capacitor of the unselected subset of capacitors to a first power supply terminal, wherein a gain of the programmable-gain amplifier is based on a ratio between a capacitance of the selected subset of capacitors and a capacitance of the unselected subset of capacitors; and

during the gain phase of the programmable-gain amplifier:

coupling a first terminal of the attenuation capacitor to the minus input of the differential amplifier and coupling a second terminal of the attenuation capacitor to the plus output of the differential amplifier, wherein the gain of the programmable-gain amplifier is attenuated based on a capacitance of the attenuation capacitor.

2. The method of claim 1 , wherein, during the sampling phase of the programmable-gain amplifier, the second terminal of each of the plurality of capacitors is coupled to an input node of the programmable-gain amplifier prior to coupling the first input signal to the input node to couple the first input signal to the second terminal of each of the plurality of capacitors.

3. The method of claim 1 , wherein the first power supply terminal is further characterized as a ground terminal.

4. The method of claim 1 , further comprising:

during the gain phase of the programmable-gain amplifier, decoupling the first input signal from the second terminal of each of the plurality of capacitors prior to the step of coupling the second terminal of each capacitor of the selected subset of capacitors indicated by the gain select signal to the plus output of the differential amplifier.

5. The method of claim 1 , wherein the programmable-gain amplifier includes a second plurality of capacitors, wherein a first terminal of each of the second plurality of capacitors is coupled to a plus input of the differential amplifier, and wherein the gain select signal indicates a second selected subset of capacitors of the second plurality of capacitors and a second unselected subset of capacitors of the second plurality of capacitors, wherein the second selected subset includes at least one capacitor of the second plurality of capacitors, and wherein the second selected subset and the second unselected subset are mutually exclusive, the method further comprising:

during the sampling phase of the programmable-gain amplifier:

coupling a second input signal to a second terminal of each of the second plurality of capacitors, wherein each of the second plurality of capacitors are coupled in parallel with each other;

during the gain phase of the programmable-gain amplifier:

coupling the second terminal of each capacitor of the second selected subset of capacitors indicated by the gain select signal to a minus output of the differential amplifier; and

when the second unselected subset of capacitors includes at least one capacitor, coupling the second terminal of each capacitor of the second unselected subset of capacitors to the first power supply terminal, wherein the gain of the programmable-gain amplifier is further based on a ratio between a capacitance of the second selected subset of capacitors and a capacitance of the second unselected subset of capacitors.

6. The method of claim 5 , wherein the programmable-gain amplifier further comprises a second attenuation capacitor, wherein the method further comprises:

during the gain phase of the programmable-gain amplifier:

coupling a first terminal of the second attenuation capacitor to the plus input of the differential amplifier and coupling a second terminal of the second attenuation capacitor to the minus output of the differential amplifier, wherein the attenuated gain of the programmable-gain amplifier is further based on a capacitance of the second attenuation capacitor.

7. The method of claim 5 , wherein, during the sampling phase of the programmable-gain amplifier, the second terminal of each of the second plurality of capacitors is coupled to a second input node of the programmable-gain amplifier prior to coupling the second input signal to the second input node to couple the second input signal to the second terminal of each of the second plurality of capacitors.

8. The method of claim 5 , wherein the first power supply terminal is further characterized as a ground terminal.

9. A programmable-gain amplifier having a first input node coupled to receive a first input signal and a control input coupled to receive a gain select signal, the programmable-gain amplifier comprising:

a differential amplifier having a first input and a first output;

a plurality of capacitors, wherein:

a first terminal of each of the plurality of capacitors is coupled to the first input of the differential amplifier; and

a second terminal of each of the plurality of capacitors is coupled to the first input node during a sampling phase of the programmable-gain amplifier and selectively coupled to the first output of the differential amplifier, based on the gain select signal, during a gain phase of the programmable-gain amplifier and;

an attenuating capacitor, wherein during the gain phase, the attenuating capacitor has a first terminal coupled to the first input of the differential amplifier and a second terminal coupled to the first output of the differential amplifier, wherein, during the gain phase, the attenuating capacitor attenuates a gain of the programmable-gain amplifier.

10. The programmable-gain amplifier of claim 9 , wherein, during the gain phase of the programmable-gain amplifier, the second terminal of any capacitor in the plurality of capacitors that is not coupled to the first output of the differential amplifier based on the gain select signal is coupled to a ground terminal.

11. The programmable-gain amplifier of claim 9 , further comprising:

a first switch coupled between the second terminal of each of the plurality of capacitors and the first input node, wherein the first switches are conductive during the sampling phase and non-conductive during the gain phase;

a second switch coupled between the second terminal of each of the plurality of capacitors and the first output of the differential amplifier, wherein each of the second switches is non-conductive during the sampling phase and selectively conductive during the gain phase based on the gain select signal; and

a third switch coupled between the first input signal and the first input node, wherein when the third switch is conductive, the first input signal is provided to the first input node, wherein, during the sampling phase, the first switches are all made conductive prior to making the third switch conductive.

12. The programmable-gain amplifier of claim 9 , further comprising:

a holding capacitor having a first terminal coupled to the first output of the differential amplifier and a second terminal, wherein the second terminal is coupled to the first input of the differential amplifier during the sampling phase and is coupled to a ground terminal during the gain phase.

13. The programmable-gain amplifier of claim 9 , wherein the differential amplifier has a second input and a second output, wherein the programmable-gain amplifier further comprises:

a second input node coupled to receive a second input signal; and

a second plurality of capacitors, wherein:

a first terminal of each of the second plurality of capacitors is coupled to the second input of the differential amplifier, and

a second terminal of each of the second plurality of capacitors is coupled to the second input node during the sampling phase of the programmable-gain amplifier and selectively coupled to the second output of the differential amplifier, based on the gain select signal, during the gain phase of the programmable-gain amplifier.

14. The programmable-gain amplifier of claim 13 , wherein, during the gain phase of the programmable-gain amplifier, the second terminal of any capacitor in the second plurality of capacitors that is not coupled to the second output of the differential amplifier based on the gain select signal is coupled to a ground terminal.

15. The programmable-gain amplifier of claim 13 , further comprising:

a first switch coupled between the second terminal of each of the second plurality of capacitors and the second input node, wherein the first switches are conductive during the sampling phase and non-conductive during the gain phase;

a second switch coupled between the second terminal of each of the second plurality of capacitors and the first output of the differential amplifier, wherein each of the second switches is non-conductive during the sampling phase and selectively conductive during the gain phase based on the gain select signal; and

a third switch coupled between the second input signal and the second input node, wherein when the third switch is conductive, the second input signal is provided to the second input node, wherein, during the sampling phase, the first switches are all made conductive prior to making the third switch conductive.

16. A programmable-gain amplifier having a first input node coupled to receive a first input signal, a second input node coupled to receive a second input signal, and a control input coupled to receive a gain select signal, the programmable-gain amplifier comprising:

a differential amplifier having a minus input, a plus input, a plus output, and a minus output; and

a first plurality of capacitors, wherein:

a first terminal of each of the first plurality of capacitors is coupled to the minus input of the differential amplifier, and

a second terminal of each of the first plurality of capacitors is coupled to the first input node during a sampling phase of the programmable-gain amplifier and selectively coupled to the plus output of the differential amplifier, based on the gain select signal, during a gain phase of the programmable-gain amplifier, and wherein, during the gain phase of the programmable-gain amplifier, the second terminal of any capacitor in the first plurality of capacitors that is not coupled to the plus output of the differential amplifier based on the gain select signal is coupled to a ground terminal;

a second plurality of capacitors, wherein:

a first terminal of each of the second plurality of capacitors is coupled to the plus input of the differential amplifier, and

a second terminal of each of the second plurality of capacitors is coupled to the second input node during the sampling phase of the programmable-gain amplifier and selectively coupled to the minus output of the differential amplifier, based on the gain select signal, during the gain phase of the programmable-gain amplifier, and wherein, during the gain phase of the programmable-gain amplifier, the second terminal of any capacitor in the second plurality of capacitors that is not coupled to the minus output of the differential amplifier based on the gain select signal is coupled to the ground terminal; and

a first attenuating capacitor, wherein during the gain phase, the first attenuating capacitor has a first terminal coupled to the minus input of the differential amplifier and a second terminal coupled to the plus output of the differential amplifier; and

a second attenuating capacitor, wherein during the gain phase, the second attenuating capacitor has a first terminal coupled to the plus input of the differential amplifier and a second terminal coupled to the minus output of the differential amplifier, wherein, during the gain phase, the first and second attenuating capacitors attenuate a gain of the programmable-gain amplifier.

17. The programmable-gain amplifier of claim 16 , further comprising:

a first switch coupled between the second terminal of each of the first plurality of capacitors and the first input node, wherein the first switches are conductive during the sampling phase and non-conductive during the gain phase;

a second switch coupled between the second terminal of each of the first plurality of capacitors and the plus output of the differential amplifier, wherein each of the second switches is non-conductive during the sampling phase and selectively conductive during the gain phase based on the gain select signal;

a third switch coupled between the first input signal and the first input node, wherein when the third switch is conductive, the first input signal is provided to the first input node, wherein, during the sampling phase, the first switches are all made conductive prior to making the third switch conductive;

a fourth switch coupled between the second terminal of each of the second plurality of capacitors and a second input node, wherein the fourth switches are conductive during the sampling phase and non-conductive during the gain phase;

a fifth switch coupled between the second terminal of each of the second plurality of capacitors and the first output of the differential amplifier, wherein each of the fifth switches is non-conductive during the sampling phase and selectively conductive during the gain phase based on the gain select signal; and

a sixth switch coupled between the second input signal and the second input node, wherein when the sixth switch is conductive, the second input signal is provided to the second input node, wherein, during the sampling phase, the fourth switches are all made conductive prior to making the sixth switch conductive.

Assignments (16)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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MERGER Recorded Jan 3, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
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RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
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To: NXP B.V.
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RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0334 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0387 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →