Semiconductor device and method of forming holes in substrate to interconnect top shield and ground shield
View Patent ↗A semiconductor device includes a multi-layer substrate. A ground shield is disposed between layers of the substrate and electrically connected to a ground point. A plurality of semiconductor die is mounted to the substrate over the ground shield. The ground shield extends beyond a footprint of the plurality of semiconductor die. An encapsulant is formed over the plurality of semiconductor die and substrate. Dicing channels are formed in the encapsulant, between the plurality of semiconductor die, and over the ground shield. A plurality of metal-filled holes is formed along the dicing channels, and extends into the substrate and through the ground shield. A top shield is formed over the plurality of semiconductor die and electrically and mechanically connects to the ground shield through the metal-filled holes. The top and ground shields are configured to block electromagnetic interference generated with respect to an integrated passive device disposed in the semiconductor die.
1. A semiconductor device, comprising:
a multi-layer substrate;
a ground shield disposed between layers of the substrate and electrically connected to a ground point;
a plurality of semiconductor die mounted to the substrate over the ground shield, wherein the ground shield extends beyond a footprint of the plurality of semiconductor die;
an encapsulant formed over the plurality of semiconductor die and substrate;
dicing channels formed in the encapsulant, between the plurality of semiconductor die, and over the ground shield;
a plurality of metal-filled holes formed along the dicing channels and extending into the substrate and through the ground shield; and
a top shield formed over the plurality of semiconductor die and electrically and mechanically connected to the ground shield through the metal-filled holes.
2. The semiconductor device of claim 1 , wherein the top shield and ground shield are each made with shielding material selected from the group consisting of copper, aluminum, stainless steel, nickel silver, low-carbon steel, and silicon-iron steel.
3. The semiconductor device of claim 1 , wherein the metal-filled holes include drilled holes in the substrate along the dicing channels and through the ground shield.
4. The semiconductor device of claim 1 , wherein the metal-filled holes are on each side of the plurality of semiconductor die.
5. The semiconductor device of claim 1 , wherein the substrate is configured to be singulated and separate the plurality of semiconductor die with the top shield and ground shield into individual semiconductor devices.
6. The semiconductor device of claim 1 , further including an integrated passive device (IPD) disposed in the plurality of semiconductor die, the top shield and ground shield configured to block electromagnetic interference with respect to the IPD.
7. A semiconductor device, comprising:
a substrate;
a ground shield embedding within the substrate;
a semiconductor die mounted to the substrate and over the ground shield, wherein the ground shield extends beyond a footprint of the semiconductor die;
an encapsulant formed over the semiconductor die and substrate;
dicing channels formed around the semiconductor die and over the ground shield;
a plurality of metal-filled holes formed along the dicing channels and extending into the substrate and through the ground shield; and
a top shield formed over the semiconductor die and electrically and mechanically connected to the ground shield through the metal-filled holes.
8. The semiconductor device of claim 7 , wherein the substrate is a multi-layer substrate and the ground shield is disposed between layers of the substrate.
9. The semiconductor device of claim 7 , wherein the metal-filled holes include drilled holes in the substrate along the dicing channels and through the ground shield.
10. The semiconductor device of claim 7 , wherein the metal-filled holes are formed on each side of the semiconductor die.
11. The semiconductor device of claim 7 , wherein the top shield and ground shield are each made with a shielding material selected from the group consisting of copper, aluminum, stainless steel, nickel silver, low-carbon steel, and silicon-iron steel.
12. The semiconductor device of claim 7 , further including an integrated passive device (IPD) disposed in the semiconductor die, the top shield and ground shield configured to block electromagnetic interference generated by the IPD.
13. A semiconductor device, comprising:
a substrate;
a ground shield embedded within the substrate;
a semiconductor die mounted to the substrate over the ground shield;
an encapsulant formed over the substrate and around the semiconductor die;
a dicing channel formed around the semiconductor die and through the encapsulant;
a plurality of metal-filled holes formed along the dicing channel and extending into the substrate and through the ground shield; and
a top shield formed over the semiconductor die and electrically and mechanically connected to the ground shield.
14. The semiconductor device of claim 13 , wherein the substrate is a multi-layer substrate and the ground shield is disposed between layers of the substrate.
15. The semiconductor device of claim 13 , wherein the metal-filled holes in the substrate include drilled holes in the substrate along the dicing channel and through the ground shield.
16. The semiconductor device of claim 13 , wherein the metal-filled holes are on each side of the semiconductor die.
17. The semiconductor device of claim 13 , wherein the top shield and ground shield are each made with a shielding material selected from the group consisting of copper, aluminum, stainless steel, nickel silver, low-carbon steel, and silicon-iron steel.
18. The semiconductor device of claim 13 , further including an integrated passive device (IPD) disposed in the semiconductor die, the top shield and ground shield configured to block electromagnetic interference with respect to the IPD.