Semiconductor device with vertical transistor
View Patent ↗The present invention provides a semiconductor device having a plurality of vertical transistors, which includes, on a substrate, a semiconductor pillar 5 ; gate electrode 11 provided on the side of the pillar via gate insulating film 10 ; first diffusion layer 9 connected to the bottom of the pillar; and second diffusion layer 16 connected to the top of the pillar, second diffusion layer 16 includes first portion 14 formed within the area over the pillar, and second portion 15 which is an epitaxial growth layer, formed on the first portion and contacting with insulating film 17 which is provided between adjacent vertical transistors.
1. A semiconductor device including a plurality of vertical transistors, which comprises, on a substrate,
a body portion of a pillar-shaped semiconductor;
a gate electrode provided on the side surface of said body portion via a gate insulating film;
a first diffusion layer connected to the bottom of said body portion; and
a second diffusion layer connected to the top of said body portion,
wherein said second diffusion layer includes a first portion formed within a region projected in the substrate vertical direction of the top surface of said body portion; and a second portion formed on the first portion and extended onto an interlayer insulating film, which is arranged between vertical transistors, outwards the region projected in the substrate vertical direction of the top surface of said body portion,
wherein a second insulating film, which is different from the interlayer insulating film, is arranged on said interlayer insulating film between two adjacent vertical transistors, and
wherein said second portion is an epitaxial growth layer formed by an isotropic selective epitaxial growth and is in contact with the side surface of said second insulating film.
2. The semiconductor device according to claim 1 , wherein said gate electrodes of adjacent vertical transistors are in contact with each other, and wherein said second insulating film is arranged above the contact portion of said gate electrodes.
3. The semiconductor device according to claim 1 , wherein said body portion is formed by engraving a semiconductor substrate having { 110 } plane as a principal surface.
4. The semiconductor device according to claim 1 , wherein said first portion of said second diffusion layer is formed by the anisotropic selective epitaxial growth.
5. The semiconductor device according to claim 1 , wherein said first portion of said second diffusion layer is bounded laterally by a side wall insulating film, and
wherein the upper end of said gate electrode in the substrate vertical direction is arranged above the top surface of said body portion, and below the upper end of said side wall insulating film.
6. The semiconductor device according to claim 1 , further comprising a contact connected to said second portion of said second diffusion layer.
7. The semiconductor device according to claim 1 , further comprising a capacitor connected to said second portion of said second diffusion layer.
8. A semiconductor device comprising a first transistor, the first transistor comprising:
a body region having a pillar-shaped region which includes at least one side surface, a top surface and a bottom surface opposite to the top surface;
a gate insulating film provided on the side surface of the body region;
a gate electrode provided on the gate insulating film such that the gate insulating film intervenes between the side surface of the body region and the gate electrode;
one of the source and drain regions connected to the bottom surface of the body region; and
the other of the source and drain regions including a first portion having a pillar-shaped electrode which includes at least one side surface, a top surface and a bottom surface opposite to the top surface of the first portion, the bottom surface of the first portion being connected to the top surface of the body region, the other of the source and drain regions further including a second portion having a bottom surface connected to the top surface of the first portion, and the bottom surface of the second portion being larger in size than the top surface of the first portion.
9. The semiconductor device according to claim 8 , wherein the second portion of the other of the source and drain regions is formed by the isotropic selective epitaxial growth.
10. The semiconductor device according to claim 8 , further comprising a capacitor which has an upper electrode and a lower electrode which has a cylindrical shape, the lower electrode being provided on the second portion of the other of the source and drain regions, and a sectional area of the lower electrode being smaller than the bottom surface of the second portion of the other of the source and drain regions.
11. The semiconductor device according to claim 8 , further comprising a second transistor adjacent to the first transistor, the second transistor being the same in construction as the first transistor, wherein the gate electrodes of the first and second transistors are connected to each other.
12. The semiconductor device according to claim 11 , further comprising an interlayer insulating film between the others of the source and drain regions of the first and second transistors so that the others of the source and drain regions of the first and second transistors are electrically separated from each other.
13. The semiconductor device according to claim 12 , wherein the interlayer insulating film includes a first insulating portion between the first portions of the others of the source and drain regions of the first and second transistors and the first insulating portion includes an oxide film.
14. The semiconductor device according to claim 13 , wherein the interlayer insulating film further includes a second insulating portion between the second portions of the others of the source and drain regions of the first and second transistors and the second insulating portion includes a nitride film.
15. The semiconductor device according to claim 11 , wherein the first and second transistors are arranged adjacently to each other in a first direction, the semiconductor device further comprising a third transistor arranged adjacently to the first transistor in a second direction different from the first direction, the third transistor being the same construction as the first transistor, the gate electrodes of the first and third transistors are electrically independent of each other.
16. The semiconductor device according to claim 15 , further comprising a fourth transistor arranged adjacently to the third transistor in the first direction, the fourth transistor being the same construction as the first transistor, wherein gate electrodes of the third and fourth transistor are connected to each other.