Element isolation structure of semiconductor and method for forming the same
View Patent ↗Disclosed are an element isolation structure of a semiconductor device and a method for forming the same, the method including preparing a semiconductor substrate having an inactive region and an active region defined thereon, forming a first hard mask on the semiconductor substrate, exposing the inactive region of the semiconductor substrate by patterning the first hard mask, forming a second hard mask on the entire surface of the semiconductor substrate including the first hard mask, forming a deep trench in the semiconductor substrate by patterning the second hard mask and the semiconductor substrate, removing the patterned second hard mask, forming a shallow trench overlapped with the deep trench by patterning the semiconductor substrate using the first hard mask as a mask, forming an insulation film on the entire surface of the substrate including the shallow trench and the deep trench, filling the shallow trench and the deep trench by forming an element isolation film on the insulation film, and forming an element isolation film pattern in the deep trench and the shallow trench by selectively removing the element isolation film.
1. A method for forming an element isolation structure of a semiconductor device comprising:
providing a semiconductor substrate having a top surface;
forming a first hard mask on the semiconductor substrate;
exposing the top surface of the semiconductor substrate by patterning the first hard mask, thereby forming a first opening with a first width, wherein no trench in the substrate is formed;
forming a second hard mask on the exposed top surface of the semiconductor substrate;
forming a deep trench region in the semiconductor substrate by patterning the second hard mask and the semiconductor substrate;
removing the patterned second hard mask;
forming a shallow trench region overlapped with the deep trench region by etching the semiconductor substrate through the first opening with the first width;
forming a side wall film and a first element isolation film in the deep trench region and the shallow trench region;
selectively removing the first element isolation film and the sidewall film in the shallow trench region such that a bottom surface of the shallow trench region is exposed, thereby forming a sidewall film pattern and a first element isolation film pattern within the deep trench region;
forming an oxide on the entire surface of the substrate including the shallow trench region; and
forming a second element isolation film pattern contacted with the first element isolation film pattern by patterning the oxide.
2. The method of claim 1 , wherein the first element isolation film comprises a polysilicon film.
3. The method of claim 1 , wherein the first element isolation film comprises a chemical vapor deposition oxide film.
4. The method of claim 1 , wherein the first hard mask comprises a pad oxide and a pad nitride.
5. The method of claim 1 , wherein the second hard mask comprises an oxide layer.
6. The method of claim 1 , wherein the deep trench region has a depth of 1 to 20 μm.
7. The method of claim 1 , wherein the selectively removing the first element isolation film and the sidewall film in the shallow trench region comprising a polishing process of the first element isolation film.
8. The method of claim 7 , wherein the sidewall film is used as an etch stop layer in the polishing process of the first element isolation film.
9. The method of claim 1 , wherein the selectively removing the first element isolation film in the shallow trench region comprises:
removing the first element isolation film on the first mask;
performing an etch-back process over the first element isolation film; and
removing the sidewall film through a wet etching.
10. The method of claim 9 , wherein the sidewall film is used as an etch stop layer in the etch-back process.
11. The method of claim 1 , wherein the patterning the second hard mask and the semiconductor substrate comprises:
forming a photosensitive film pattern on the second hard mask, thereby forming a second opening with a second width;
etching the second hard mask and the semiconductor substrate through the second opening by using the photosensitive film pattern as a mask.
12. The method of claim 1 , wherein the removing the patterned second hard mask comprising completely removing the patterned second hard mask over the first hard mask and the silicon substrate such that the first opening is opened.