IP Library Granted Patent US 8,377,808
Granted Patent B2
US 8,377,808 · App. 13/050,345 · Granted Feb 19, 2013

Semiconductor device and method of manufacturing the same

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Quick Facts
Patent No.
US 8,377,808
App. No.
13/050,345
Granted
Feb 19, 2013
Kind
B2
Abstract

In the substrate and the epitaxial layer, isolation regions are formed to divide the substrate and the epitaxial layer into a plurality of element formation regions. Each of the isolation regions is formed by connecting first and second P type buried diffusion layers with a P type diffusion layer. By disposing the second P type buried diffusion layer between the first P type buried diffusion layer and the P type diffusion layer, a lateral diffusion width of the first P type buried diffusion layer is reduced. This structure allows a formation region of the isolation region to be reduced in size.

Claims (17)

1. A method for manufacturing a semiconductor device, comprising:

preparing a one-conductivity-type semiconductor substrate;

forming an opposite-conductivity-type epitaxial layer on the semiconductor substrate after implanting ions of an impurity for forming a first one-conductivity-type buried diffusion layer into the semiconductor substrate; and

forming an isolation region by firstly implanting ions of an impurity for forming a second one-conductivity-type buried diffusion layer from a surface of the epitaxial layer, then continuously implanting ions of an impurity for forming a one-conductivity-type diffusion layer, and finally performing thermal diffusion, so as to connect the first one-conductivity-type buried diffusion layer, the second one-conductivity-type buried diffusion layer and the one-conductivity-type diffusion layer with one another,

wherein, after a LOCOS oxide film is formed in the epitaxial layer, ions of the impurity for forming the second one-conductivity-type buried diffusion layer and ions of the impurity for forming the one-conductivity-type diffusion layer are implanted from above the LOCOS oxide film.

2. The method of claim 1 wherein the second one-conductivity-type buried diffusion layer and the one-conductivity type diffusion layer are formed in the same thermal diffusion step so as to connect the first one-conductivity-type buried diffusion layer, the second one-conductivity-type buried diffusion layer and the one-conductivity-type diffusion layer with one another.

3. A method for manufacturing a semiconductor device, comprising the steps of:

preparing a one-conductivity-type semiconductor substrate;

forming an opposite-conductivity-type epitaxial layer on the semiconductor substrate after implanting ions of an impurity for forming a first one-conductivity-type buried diffusion layer into the semiconductor substrate; and

forming an isolation region by firstly implanting ions of an impurity for forming a second one-conductivity-type buried diffusion layer from a surface of the epitaxial layer, then continuously implanting ions of an impurity for forming a one-conductivity-type diffusion layer, and finally performing thermal diffusion, so as to connect the first one-conductivity-type buried diffusion layer, the second one-conductivity-type buried diffusion layer and the one-conductivity-type diffusion layer with one another,

wherein, in the step of implanting ions of the impurity for forming the second one-conductivity-type buried diffusion layer and ions of the impurity for forming the one-conductivity-type diffusion layer, the ion implantation is performed so as to allow impurity concentration peaks of the second one-conductivity type buried diffusion layer and the one-conductivity-type diffusion layer to be positioned closer to the surface of the epitaxial layer than a center of the epitaxial layer.

4. The method for manufacturing a semiconductor device, according to claim 3 , wherein ions of the impurity for forming the second one-conductivity-type buried diffusion layer and ions of the impurity for forming the one-conductivity-type diffusion layer are implanted by use of a same resist mask.

5. A method for manufacturing a semiconductor device, comprising the steps of:

preparing a one-conductivity-type semiconductor substrate;

forming an opposite-conductivity-type epitaxial layer on the semiconductor substrate after implanting ions of an impurity for forming a first one-conductivity-type buried diffusion layer into the semiconductor substrate; and

forming an isolation region by firstly implanting ions of an impurity for forming a second one-conductivity-type buried diffusion layer from a surface of the epitaxial layer, then continuously implanting ions of an impurity for forming a one-conductivity-type diffusion layer, and finally performing thermal diffusion, so as to connect the first one-conductivity-type buried diffusion layer, the second one-conductivity-type buried diffusion layer and the one-conductivity-type diffusion layer with one another,

wherein, after a LOCOS oxide film is formed in the epitaxial layer, ions of the impurity for forming the second one-conductivity-type buried diffusion layer and ions of the impurity for forming the one-conductivity-type diffusion layer are implanted from above the LOCOS oxide film by use of a same resist mask.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2016
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038988/0600 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 033813 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 21, 2015
From: SYSTEM SOLUTIONS CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034816/0510 →
CHANGE OF NAME Recorded Dec 3, 2014
From: SANYO SEMICONDUCTOR CO., LTD
To: SYSTEM SOLUTIONS CO., LTD.
Reel/Frame 034537/0044 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2014
From: SANYO SEMICONDUCTOR CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033813/0420 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2011
From: SOMA, MITSURU; HATA, HIROTSUGU; AMATATSU, YOSHIMASA
To: SANYO ELECTRIC CO., LTD.; SANYO SEMICONDUCTOR CO., LTD.
Reel/Frame 025984/0979 →