IP Library Granted Patent US 8,458,541
Granted Patent B2
US 8,458,541 · App. 13/071,512 · Granted Jun 4, 2013

System and method for debugging scan chains

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Quick Facts
Patent No.
US 8,458,541
App. No.
13/071,512
Granted
Jun 4, 2013
Kind
B2
Abstract

Scan chains are used to detect faults in integrated circuits but with the size of today's circuits, it is difficult to detect and locate scan chain faults, especially when the scan data in and scan data out have been compressed. A method for debugging scan chains includes selecting a scan chain for debugging using a scan chain selection block and then providing scan test vectors to the selected scan chain. The scan test vectors undergo various scan test stages to generate scan response vectors. The scan response vectors are compared with ideal response vectors to identify a failing scan chain.

Claims (37)

1. A system for testing a scan chain, comprising:

a scan block for providing a scan test vector to the scan chain;

a scan chain selection block, connected to the scan block, for selecting the scan chain to be provided with the scan test vector;

a scan chain mask block, connected to the scan chain, for masking the scan chain and generating a scan test response vector; and

an enhanced mask control block, connected to the scan chain selection block and the scan chain mask block, for controlling the scan chain selection block to select the scan chain to be provided with the scan test vector and controlling the scan chain mask block to mask the scan chain; and

a compressor, connected to the scan chain mask block, for compressing the scan test response vector obtained from the scan chain mask block.

2. The scan chain testing system of claim 1 , wherein the scan test vector is received by way of a chip pin.

3. The scan chain testing system of claim 1 , wherein the scan test vector is generated on-chip.

4. The scan chain testing system of claim 1 , further comprising, an automatic test pattern generator (ATPG), connected to the scan block, for generating the scan test vector and providing the scan test vector to the scan block.

5. The scan chain testing system of claim 4 , further comprising a decompressor, connected to the ATPG, for decompressing the scan test vector received from the ATPG, wherein the decompressor randomizes the scan test vector received from the ATPG.

6. The scan chain testing system of claim 5 , further comprising:

a first multiplexer, connected to the decompressor, the scan chain selection block, and the scan chain, for providing the scan test vector received from at least one of the decompressor and the scan chain selection block; and

a mode control block for providing a first mode select signal to the first multiplexer to control an output of the first multiplexer.

7. The scan chain testing system of claim 6 , wherein the mode control block generates a second mode select signal, the system further comprising:

a customary mask control block, connected to the scan chain mask block, for controlling the scan chain mask block to mask the scan chain based on the scan test response vector; and

a second multiplexer, connected to the enhanced mask control block, the customary mask control block, and the mode control block, for providing a mask signal generated by at least one of the enhanced mask control block and the customary mask control block, wherein the second multiplexer operates based on a second mode select signal generated by the mode control block.

8. A system for testing a scan chain, comprising:

an automatic test pattern generator (ATPG) for generating a scan test vector;

a scan block, connected to the ATPG, that receives the scan test vector and provides the scan test vector to the scan chain;

a decompressor, connected to the ATPG, for decompressing the scan test vector received from the ATPG;

a scan chain selection block, connected between the scan block and the scan chain, for selecting the scan chain to be provided with the scan test vector from a plurality of scan chains;

a mode control block for generating a first mode select signal;

a first multiplexer having a first data input connected to the decompressor, a second data input connected to the scan chain selection block, and an output connected to the scan chain, wherein the first multiplexer provides the scan test vector received from one of the decompressor and the scan chain selection block, and wherein the first multiplexer operates based on the first mode select signal;

a scan chain mask block, connected to the output of the scan chain, for masking a scan response vector received from the scan chain;

an enhanced mask control block, connected to the scan chain selection block, for controlling the scan chain selection block to select the scan chain to be provided with the scan test vector, wherein the enhanced mask control block also controls the scan chain mask block;

a customary mask control block for controlling the scan chain mask block to mask the scan chain based on the scan test response vector obtained from the scan chain;

a second multiplexer, connected to the enhanced mask control block, the customary mask control block, and the mode control block, for providing a masking signal generated by at least one of the enhanced mask control block and the customary mask control block, wherein the second multiplexer operates based on a second mode select signal generated by the mode control block; and

a compressor, connected to the scan chain mask block, for compressing the scan test response vector obtained from the scan chain mask block.

9. The scan chain testing system of claim 8 , wherein the decompressor randomizes the scan test vector received from the ATPG.

10. A method for testing a scan chain, comprising:

selecting a scan chain from a plurality of scan chains;

providing a scan test vector to the selected scan chain using at least one of a scan logic and a decompressor logic, wherein the decompressor logic randomizes the scan test vector;

receiving a scan test response vector from the selected scan chain;

masking the non-selected scan chains; and

compressing the scan test response vector.

11. The method of claim 10 , wherein providing the scan test vector comprises providing the scan test vector in a broadcast mode.

12. The method of claim 10 , further comprising loading constant data into the non-selected scan chains.

Assignments (30)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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MERGER Recorded Jan 3, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041144/0363 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT Recorded Jan 31, 2012
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SECURITY AGREEMENT Recorded Jan 31, 2012
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From: JAIN, SANDEEP; KRISHNAMOORTHY, NIKILA; CHAUDHARY, ABHISHEK; MAHAJAN, NIPUN; CHAUHAN, SAURABH
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