IP Library Granted Patent US 8,461,043
Granted Patent B2
US 8,461,043 · App. 13/083,868 · Granted Jun 11, 2013

Barrier layer for integrated circuit contacts

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Quick Facts
Patent No.
US 8,461,043
App. No.
13/083,868
Granted
Jun 11, 2013
Kind
B2
Abstract

Plug contacts may be formed with barrier layers having thicknesses of less than 50 Å in some embodiments. In one embodiment, the barrier layer may be formed by the chemical vapor deposition of diborane, forming a boron layer between a metallic contact and the surrounding dielectric and between a metallic contact and the substrate and/or substrate contact. This boron layer may be substantially pure boron and boron silicide.

Claims (11)

1. A method comprising:

forming a contact aperture in a dielectric material that is formed over a substrate, the substrate including a contact formed therein;

forming a barrier layer including boron and having a thickness of less than 50 Angstroms between a metal fill and the contact aperture, a layer including titanium formed over the contact and wherein the barrier layer is formed over the layer including titanium.

2. The method of claim 1 including forming said barrier layer by the chemical vapor deposition of diborane.

3. The method of claim 1 including forming the barrier layer substantially only boron.

4. The method of claim 1 including forming said barrier layer of boron silicide.

5. The method of claim 1 including forming the barrier layer between the dielectric material and the metal fill.

6. The method of claim 1 including extending said barrier layer from the contact to a wall of said contact aperture.

7. The method of claim 1 including keeping the region between walls of the contact aperture and the metal fill free of titanium nitride.

8. The method of claim 1 , further comprising forming the contact in the substrate from titanium silicide.

9. The method of claim 1 , further comprising forming the metal fill from tungsten.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2011
From: NUMONYX B.V.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 027126/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2011
From: ROZENBLAT, AVRAHAM; HAIMSON, SHAI; DRORI, ROTEM; ROTLAIN, MAOR; HORVITZ, DROR
To: MICRON TECHNOLOGY, INC.
Reel/Frame 026105/0106 →