Granted Patent B1

US 8,080,448 · App. 13/092,170 · Granted Dec 20, 2011

Abstract

Claims (29)

1. A method of making semiconductor devices, comprising:

providing an array of first lead frames, each of which comprises a plurality of rows of first electrical contact elements on respective sides thereof;

applying a first molding compound to said array of first lead frames to provide support between said first electrical contact elements of each of said first lead frames, and

singulating said first lead frames to produce a plurality of sub-assemblies;

providing a plurality of second lead frames each of which comprises a plurality of rows of second electrical contact elements on respective sides thereof,

placing a respective one of said sub-assemblies inside one of said second lead frames, wherein said rows of first electrical contact elements are nested adjacent to and inside said rows of second electrical contact elements, and

attaching a semiconductor die on said respective ones of said sub-assemblies;

connecting each of said semiconductor dies electrically to said first and second electrical contact elements of the respective first and second lead frames, thereby forming a plurality of assemblies;

encapsulating said assemblies using a second molding compound, wherein said rows of first and second electrical contact elements are exposed on adjacent sides of an active face of the respective semiconductor device; and

singulating said assemblies.

2. The method of making semiconductor devices of claim 1 , wherein each of said first lead frames comprises a respective die pad disposed between said rows of first electrical contact elements, wherein said semiconductor dies are mounted on said die pads.

3. The method of making semiconductor devices of claim 2 , wherein encapsulating said assemblies leaves said die pads exposed in said active faces of the respective semiconductor devices.

4. The method of making semiconductor devices of claim 2 , wherein producing said sub-assemblies includes applying said first molding compound to provide support for said die pads as well as for said first electrical contact elements of said first lead frames.

5. The method of making semiconductor devices of claim 1 , wherein said semiconductor dies are mounted on said sub-assemblies respectively before said sub-assemblies are disposed in said assemblies.

6. The method of making semiconductor devices of claim 1 , wherein producing said sub-assemblies includes mounting said array of first lead frames on a first adhesive tape, applying said first molding compound to said first lead frames on said adhesive tape, and removing said first adhesive tape before singulating said first lead frames.

7. The method of making semiconductor devices of claim 1 , wherein each of said second lead frames presents an aperture between said rows of second electrical contact elements, and forming said array of assemblies includes mounting an array of said second lead frames on a second adhesive tape, and mounting said sub-assemblies on said second adhesive tape in said apertures of respective ones of said second lead frames.

8. The method of making semiconductor devices of claim 7 , wherein encapsulating said assemblies includes applying said second molding compound to said sub-assemblies and said second lead frames on said second adhesive tape, wherein said second adhesive tape is removed before singulating said assemblies.

9. The method of making semiconductor devices of claim 1 , wherein each of said first lead frames comprises two orthogonal pairs of rows of first electrical contact elements on respective sides of the first lead frame and each of said second lead frames comprises two orthogonal pairs of rows of second electrical contact elements on respective sides of the second lead frame, said semiconductor devices forming quad packages.

10. A semiconductor device, comprising:

a first lead frame including on respective sides thereof a plurality of rows of first electrical contact elements;

a first molding compound that provides support between said first electrical contact elements, wherein said first lead frame and said first molding compound form a sub-assembly;

a second lead frame including on respective sides thereof a plurality of rows of second electrical contact elements, wherein said sub-assembly is disposed between said rows of second electrical contact elements with said rows of first electrical contact elements nested adjacent to and inside said rows of second electrical contact elements;

a semiconductor die mounted on said sub-assembly;

electrical connections between said semiconductor die and said first and second electrical contact elements; and

a second molding compound disposed on said rows of first and second electrical contact elements, wherein said first and second electrical contact elements present exposed electrical contact surfaces on adjacent sides of an active face of the semiconductor die.

11. The semiconductor device of claim 10 , wherein said first lead frame includes a die pad disposed between said rows of first electrical contact elements, wherein said semiconductor die is mounted on said die pad.

12. The semiconductor device of claim 11 , wherein said second molding compound leaves said die pad exposed in said active face of the semiconductor device.

13. The semiconductor device of claim 11 , wherein said first molding compound of said sub-assembly provides support for said die pad as well as for said first electrical contact elements.

14. The semiconductor device of claim 10 , wherein the first lead frame includes two orthogonal pairs of rows of said first electrical contact elements on respective sides of the semiconductor die and said second lead frame includes two orthogonal pairs of rows of second electrical contact elements on respective sides of the semiconductor die, wherein said semiconductor device is a quad package.

Assignments (22)