Granted Patent B2

US 8,102,959 · App. 13/092,616 · Granted Jan 24, 2012

Abstract

Claims (34)

1. A digital audio processing system comprising:

an input to receive a phase component of a signal;

symbol recognition logic to adjust a sample of the phase component using an offset value, to map the adjusted sample to a nearest predetermined phase value of a plurality of predetermined phase values, and to determine a symbol using a difference between the nearest predetermined phase value and a prior nearest predetermined phase value of the plurality of predetermined phase values, the prior nearest predetermined phase value corresponding to a prior sample of the phase component of the signal, wherein the offset value is based on a detected error of the prior sample of the phase component of the signal; and

an output to provide a second signal that indicates the symbol.

2. The digital audio processing system of claim 1 , wherein the plurality of predetermined phase values includes zero degrees, ninety degrees, one hundred eighty degrees, and two hundred seventy degrees.

3. The digital audio processing system of claim 1 , wherein the symbol indicates a phase difference of zero degrees, ninety degrees, one hundred eighty degrees, or two hundred seventy degrees between the sample and the prior sample.

4. The digital audio processing system of claim 1 , wherein the symbol is a Near Instantaneous Companded Audio Multiplex (NICAM) symbol.

5. The digital audio processing system of claim 1 , further comprising a phase accumulator to provide the offset value.

6. The digital audio processing system of claim 5 , wherein the symbol recognition logic includes logic to update a value stored at the phase accumulator based on a difference between the adjusted sample and the nearest predetermined phase value corresponding to the sample.

7. The digital audio processing system of claim 1 , wherein the offset value represents phase drift.

8. The digital audio processing system of claim 1 , wherein a symbol slicer of the symbol recognition logic sends the symbol to the input.

9. The digital audio processing system of claim 8 , wherein the symbol slicer determines the symbol.

10. The digital signal processing system of claim 1 , wherein an error detector of the symbol recognition logic maps the adjusted sample to the nearest predetermined phase value of the plurality of predetermined phase values.

11. A method comprising:

receiving a phase signal input at symbol recognition logic;

adjusting, via the symbol recognition logic, a sample of the phase signal input to produce an adjusted sample of the phase signal input using an offset value based on detected errors of a closest prior sample and other prior samples of the phase signal input;

mapping the adjusted sample to a nearest predetermined phase value of a plurality of predetermined phase values; and

determining, via the symbol recognition logic, a symbol based on a difference between the nearest predetermined phase value and a prior nearest predetermined phase value of the closest prior sample.

12. The method of claim 11 , further comprising outputting the symbol via an output.

13. The method of claim 11 , wherein the plurality of predetermined phase values includes zero degrees, ninety degrees, one hundred eighty degrees, and two hundred seventy degrees.

14. The digital audio processing system of claim 1 , wherein the symbol is a Near Instantaneous Companded Audio Multiplex (NICAM) symbol.

15. The method of claim 11 , wherein the symbol indicates a phase difference of zero degrees, ninety degrees, one hundred eighty degrees, or two hundred seventy degrees between the sample and the closest prior sample.

16. The method of claim 11 , further comprising determining the offset value.

17. The method of claim 16 , wherein determining the offset value comprises:

mapping the adjusted sample to the nearest predetermined phase value of the plurality of predetermined phase values to produce a first output;

filtering the first output with a low-pass filter;

integrating a second output of the low-pass filter with an integrator to generate a third output;

outputting a weighted average of the second output and the third output to produce a fourth output; and

updating the offset value at a phase accumulator based on the fourth output.

18. The method of claim 11 , wherein an error slicer of the symbol recognition logic determines the symbol.

19. A digital signal processing system, comprising:

an input to receive a phase signal, wherein a first sample of the phase signal and a second sample of the phase signal are offset by less than forty-five degrees, a third sample of the phase signal is offset by less than forty-five degrees from the second sample but offset by greater than forty-five degrees from the first sample, and each sample of a plurality of samples of the phase signal received at the input prior to the first sample is offset from a prior sample of the plurality of samples by a substantially constant phase drift amount; and

symbol recognition logic to determine a symbol that indicates a phase difference with respect to the second sample and the third sample, wherein the symbol is at least partially determined based on the substantially constant phase drift amount and a phase difference between the second sample and the third sample.

20. The digital signal processing system of claim 19 , wherein the symbol indicates a ninety degree phase difference when the substantially constant phase drift amount is approximately zero.

Assignments (20)