IP Library Granted Patent US 8,138,085
Granted Patent B2
US 8,138,085 · App. 13/093,798 · Granted Mar 20, 2012

Laser annealing for 3-D chip integration

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Quick Facts
Patent No.
US 8,138,085
App. No.
13/093,798
Granted
Mar 20, 2012
Kind
B2
Abstract

A laser annealing method for annealing a stacked semiconductor structure having at least two stacked layers is disclosed. A laser beam is focused on a lower layer of the stacked layers. The laser beam is then scanned to anneal features in the lower layer. The laser beam is then focused on an upper layer of the stacked layers, and the laser beam is scanned to anneal features in the upper layer. The laser has a wavelength of less than one micrometer. The beam size, depth of focus, energy dosage, and scan speed of the laser beam are programmable. Features in the lower layer are offset from features in the upper layer such that these features do not overlap along a plane parallel to a path of the laser beam. Each of the stacked layers includes active devices, such as transistors. Also, the first and second layers may be annealed simultaneously.

Claims (12)

1. A method for laser annealing a stacked semiconductor structure having at least two stacked layers, comprising the steps of:

focusing a first laser beam on a lower layer of the stacked layers;

focusing a second laser beam on an upper layer of the stacked layers; and

scanning the first and second laser beams to anneal the features, respectively, in the lower layer and the upper layer, wherein

the first and second laser beams are scanned together to anneal the features, respectively, in the lower layer and the upper layer.

2. The method according to claim 1 , wherein the first laser beam having a first wavelength, and the second laser beam having a second wavelength different than the first wavelength.

3. The method according to claim 1 , wherein the first laser beam having a first spot size, and the second laser beam having second spot size different than the first spot size.

4. The method according to claim 1 , wherein spot size, depth of focus, and energy density of both the first and second laser beams are programmable.

5. The method according to claim 1 , wherein the scanning speed of both the first and second laser beams is programmable.

6. The method according to claim 1 , wherein features in the lower layer are offset from features in the upper layer such that these features do not overlap along a plane parallel to a path of the laser beam.

7. The method according to claim 1 , wherein each of the stacked layers includes an active device, a passive device, or a combination thereof.

8. The method according to claim 7 , wherein at least one of the devices is a transistor.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2019
From: ULTRATECH, INC.
To: VEECO INSTRUMENTS INC.
Reel/Frame 051446/0476 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2014
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ULTRATECH, INC.
Reel/Frame 033519/0066 →