Granted Patent B2

US 8,198,143 · App. 13/097,066 · Granted Jun 12, 2012

Abstract

Claims (9)

1. A method of packaging an integrated circuit (IC) die, comprising:

attaching and electrically connecting the IC die to a substrate having a plurality of grooves formed thereon in a staggered arrangement around the periphery of a molding area of the substrate;

placing the IC die and the substrate into a mold cavity of a mold having a plurality of mold parts, wherein a vent extending away from the mold cavity is defined between the mold parts, and at least some of the grooves on the substrate intersect with the vent; and

covering the IC die and the molding area of the substrate with a mold compound, wherein the mold compound is injected into the mold cavity by way of a center gate.

2. The method of packaging an IC die of claim 1 , wherein said at least some of the grooves intersect with a constricted portion of the vent and extend in a direction transverse to a length direction of the vent.

3. The method of packaging an IC die of claim 2 , further comprising:

aligning a first groove on the substrate with a first constriction in the constricted portion of the vent and a second groove on the substrate with a second constriction in the constricted portion of the vent, wherein the second constriction is narrower than the first.

4. The method of packaging an IC die of claim 1 , wherein the grooves have a depth of between about 3 μm to about 7 μm.

5. The method of packaging an IC die of claim 1 , wherein the grooves are formed in a plurality of rows around the periphery of the molding area on the base substrate and first grooves in a first row are staggered from and overlap adjacent second grooves in a second row.

Assignments (30)