IP Library Granted Patent US 8,436,662
Granted Patent B2
US 8,436,662 · App. 13/104,809 · Granted May 7, 2013

Junction gate driver with tapped inductor current source

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,436,662
App. No.
13/104,809
Granted
May 7, 2013
Kind
B2
Abstract

A junction device driver is provided that includes a current regulator, an inductor coupled with the current regulator, and a switching module coupled with the inductor. The current regulator is configured to generate a current, and the inductor is configured to store energy generated by the current produced by the current regulator. The switching module is configured to control a conduction current for a gate of a junction device. The conduction current is generated, initially, from the stored energy of the inductor to thereby provide a relatively high initial current. As the energy stored in the inductor is discharged, the current level drops to a lower level that is sufficient to maintain the junction device in an “on” state.

Claims (45)

1. A current driver apparatus comprising:

a current regulator configured to generate a current;

a tapped inductor comprising an input terminal coupled with the current regulator, an output terminal, and a tap terminal, and configured to receive the current and store energy;

a first switching module coupled with the output terminal and configured to control a conduction current for a junction device that is provided through the output terminal, wherein the conduction current is at least partially generated from the stored energy of the inductor; and

a second switching module coupled with the tap terminal and configured to change the inductance present at the output terminal of the tapped inductor.

2. The apparatus of claim 1 , wherein the first switching module is further configured to switch the output terminal of the tapped inductor to a voltage supply of the current regulator module and thereby discharge the gate and substantially terminate currents to the junction device.

3. The apparatus of claim 1 , wherein the second switching module is configured to change the inductance present at the output terminal of the tapped inductor to a lower inductance when the first switching module initially couples the output terminal of the tapped inductor to the junction device.

4. The apparatus of claim 3 , wherein the second switching module is configured to change the inductance present at the output terminal of the tapped inductor to a higher inductance after the first switching module couples the output terminal of the tapped inductor to the junction device.

5. The apparatus of claim 1 , wherein the first and second switching modules are configured to maintain a current through the inductor that is lower than the conduction current when the output terminal of the inductor is not coupled to the junction device.

6. The apparatus of claim 1 , wherein the first switching circuit module is further configured to bias the junction device to a negative potential.

7. The apparatus of claim 1 , wherein the junction device is a JFET.

8. The apparatus of claim 1 , wherein the junction device is a bipolar junction transistor.

9. A gate driver apparatus comprising:

a current regulator module configured to generate a current;

an inductor, coupled to the current regulator module and configured to receive current from the current regulator module and store energy generated from the received current; and

a switching module, coupled to the inductor, and configured to (i) switch an output terminal of the inductor to be coupled to a junction device and (ii) switch an inductance present at the output terminal of the inductor utilizing a tap terminal on the inductor,

wherein the inductor is configured to provide a first current to the junction device through the output terminal that is greater than the current generated by the current regulator module, and to provide a second current to the junction device through the output terminal that is smaller in magnitude than the first current, and wherein the first current is at least partially generated from the stored energy of the inductor.

10. The apparatus of claim 9 , wherein the switching module is further configured to switch the output terminal of the inductor to a voltage supply of the current regulator module and thereby discharge the junction device and substantially terminate currents to the junction device.

11. The apparatus of claim 9 , wherein the switching module switches the output terminal of the inductor to the junction device when energy generated from the current is stored in the inductor.

12. The apparatus of claim 9 , wherein the current regulator module generates current within a defined range.

13. The apparatus of claim 9 , wherein the current regulator module comprises a pair of comparators configured to receive a first input voltage and a second input voltage, wherein the first voltage and the second voltage are used to define the maximum and minimum current of the defined current range of the current regulator module.

14. The apparatus of claim 9 , wherein the current regulator module comprises a comparator with hysteresis coupled to a current sensor that senses current from the inductor.

15. The apparatus of claim 9 , wherein the switching module comprises a connection to a voltage supply.

16. The apparatus of claim 9 , wherein the junction device is a JFET.

17. The apparatus of claim 9 , further comprising a level shift circuit module coupled with the gate of the device, configured to pass current to the junction device that is greater than the current of the current regulator.

18. A method for driving current to a junction device, comprising:

storing energy in a tapped inductor coupled between a current regulator module and a junction device;

switching an output terminal of the inductor to the junction device;

switching a tap terminal of the tapped inductor to change an inductance present at the output terminal of the inductor;

discharging the stored energy from the inductor to the junction device through the output terminal to provide an initial current to the junction device; and

after the discharging, providing a sustaining current from the inductor to the junction device through the output terminal.

19. The method of claim 18 , further comprising:

switching the output terminal of the inductor from the junction device to a voltage supply of the current regulator module; and

secondly storing energy in the inductor.

20. The method of claim 18 , wherein the providing a sustaining current comprises:

changing an inductance present at the output of the inductor, and

maintaining a current through the inductor within a defined range.

21. The method of claim 18 , wherein the junction device comprises one or more of a JFET and a bipolar junction transistor.

22. The method of claim 18 , wherein the storing comprises:

coupling the inductor between the current regulator module and a voltage supply of the current regulator;

maintaining a current through the inductor within a defined range.

23. The method of claim 18 , wherein the current regulator module generates current within a defined range.

24. The method of claim 18 , wherein the current regulator module comprises a pair of comparators configured to receive a first input voltage and a second input voltage, wherein the first voltage and the second voltage are used to define the maximum and minimum current of the defined current range of the current regulator module.

25. The method of claim 18 , further comprising shifting a voltage level that is present at the junction of the device.

26. The method of claim 18 , wherein while discharging the stored energy, the current regulator module is switched to provide substantially no current output.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.; MICROSEMI SOC CORP.; MICROSEMI CORP. - POWER PRODUCTS GROUP; MICROSEMI CORP. - RF INTEGRATED SOLUTIONS
Reel/Frame 046251/0391 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION); MICROSEMI SOC CORP. (F/K/A ACTEL CORPORATION); MICROSEMI CORP. - POWER PRODUCTS GROUP (F/K/A ADVANCED POWER TECHNOLOGY INC.); MICROSEMI CORP. - RF INTEGRATED SOLUTIONS (F/K/A AML COMMUNICATIONS, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
SECURITY AGREEMENT Recorded Apr 22, 2015
From: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP; MICROSEMI SEMICONDUCTOR (U.S.) INC.; MICROSEMI SOC CORP.; MICROSEMI FREQUENCY AND TIME CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 035477/0057 →