IP Library Granted Patent US 8,461,865
Granted Patent B2
US 8,461,865 · App. 13/126,854 · Granted Jun 11, 2013

Logic built-in self-test system and method for applying a logic built-in self-test to a device under test

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,461,865
App. No.
13/126,854
Granted
Jun 11, 2013
Kind
B2
Abstract

A logic built-in self test (LBIST) system comprises a device under test having a first plurality of first bistable multivibrator circuits an LBIST controller, and a second plurality of second bistable multivibrator circuits. Each second bistable multivibrator circuit is coupled to a corresponding first bistable multivibrator circuit to swap a second state value kept by the second bistable multivibrator circuit with a first state value kept by the corresponding first bistable multivibrator circuit depending on a first control signal from the LBIST controller and the second bistable multivibrator circuits are coupled to form one or more scan chains when receiving a second control signal from the LBIST controller.

Claims (49)

1. A logic built-in self test system, comprising

a device under test having a first plurality of first bistable multivibrator circuits;

a logic built-in self test (LBIST) controller; and

a second plurality of second bistable multivibrator circuits,

each second bistable multivibrator circuit coupled to a corresponding first bistable multivibrator circuit and configured to swap a second state value kept by said second bistable multivibrator circuit with a first state value kept by said corresponding first bistable multivibrator circuit in response to a first control signal from said LBIST controller, and

said second bistable multivibrator circuits coupled to form one or more scan chains when receiving a second control signal from said LBIST controller, wherein said second bistable multivibrator circuits are further configured to receive a second clock signal, the second clock signal different from a first clock signal received by said corresponding first bistable vibrator circuits.

2. The LBIST system as claimed in claim 1 further comprising:

each second bistable multivibrator circuit is further coupled to said corresponding first bistable multivibrator circuit to swap said first state value kept by said second bistable multivibrator circuit with said second state value kept by said corresponding first bistable multivibrator circuit in response to said first control signal from said LBIST controller.

3. The LBIST system as claimed in claim 2 , wherein said second bistable multivibrator circuit comprises:

a first bistable multivibrator receiving and providing said first state value of said first bistable multivibrator circuit to said first bistable multivibrator circuit; and

a second bistable multivibrator providing and receiving said second state value from said first bistable multivibrator circuit.

4. The LBIST system as claimed in claim 1 , wherein said second bistable multivibrator circuit comprises:

a first bistable multivibrator receiving and providing said first state value of said first bistable multivibrator circuit to said first bistable multivibrator circuit; and

a second bistable multivibrator providing and receiving said second state value from said first bistable multivibrator circuit.

5. The LBIST system as claimed in claim 1 , wherein said second state values comprise test values.

6. The LBIST system as claimed in claim 1 , wherein a frequency of the second clock signal is different than a frequency of the first clock signal.

7. The LBIST system as claimed in claim 6 , wherein a power consumption of said LBIST system is adjusted by varying said frequency of the second clock signal.

8. The LBIST system as claimed in claim 6 , wherein a length of time for swapping each of said second state values with said first state values is the time required for one clock cycle of said first clock signal.

9. The LBIST system as claimed in claim 1 , a frequency of the second clock signal and a frequency of the first clock signal are the same.

10. The LBIST system as claimed in claim 1 , wherein a length of time for swapping each of said second state values with said first state values is independent of the number of first bistable multivibrator circuits.

11. The LBIST system as claimed in claim 1 , wherein one or more of said corresponding first bistable multivibrator circuits coupled to said second bistable multivibrator circuits forming said one or more scan chains are operable to change said first state values during a same period of time as said LBIST controller reads or writes said second state values of one or more of said second bistable multivibrator circuits forming said scan chains.

12. The LBIST system as claimed in claim 1 further comprising:

a pattern generator of said LBIST controller; and

a signature generator of said LBIST controller, wherein

at least one of said one or more scan chains comprises an input coupled to an output of the pattern generator of said LBIST controller and an output coupled to an input of the signature generator of said LBIST controller.

13. The LBIST system as claimed in claim 1 , wherein said device under test is a partition of a microcontroller unit.

14. A method for applying a logic built-in self-test to a device under test having a first plurality of first bistable multivibrator circuits, the method comprising:

writing second state values into a second plurality of second bistable multivibrator circuits, each second bistable multivibrator circuit coupled to a corresponding first bistable multivibrator circuit;

receiving a second clock signal at the second bistable multivibrator;

swapping said second state values with first state values kept by said corresponding first bistable multivibrator circuits;

applying said second state values kept in said first bistable multivibrator circuits to said device under test;

capturing a test result in said second state values by applying a first clock signal to said first bistable multivibrator circuits, the first clock signal different from the second clock signal;

swapping said second state values kept by said corresponding first bistable multivibrator circuits with said first state values kept by said second bistable multivibrator circuits; and

reading said second state values kept by said second bistable multivibrator circuits.

15. A safety critical system, comprising a logic built-in self-test (LBIST) system as claimed in claim 1 .

16. A vehicle comprising the safety critical system as claimed in claim 15 .

17. The method of claim 14 :

wherein the second clock signal comprises a frequency different from the first clock signal.

18. The method of claim 17 further comprising:

adjusting a power consumption of said logic built-in self-test system by adjusting said frequency of the second clock signal.

19. The method of claim 14 wherein said second state values comprise test values.

20. A non-transitory computer-readable storage medium storing instructions executable by a processor and configured to:

write second state values into a second plurality of second bistable multivibrator circuits, wherein each second bistable multivibrator circuit is coupled to a corresponding first bistable multivibrator circuit;

receive a second clock signal at the second bistable multivibrator;

swap said second state values with first state values kept by said corresponding first bistable multivibrator circuits;

apply said second state values kept in said first bistable multivibrator circuits to a device under test;

capture a test result in said second state values by applying a first clock signal to said first bistable multivibrator circuits, the first clock signal different from the second clock signal;

swap said second state values kept by said corresponding first bistable multivibrator circuits with said first state values kept by said second bistable multivibrator circuits; and

read said second state values kept by said second bistable multivibrator circuits.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0387 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0334 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0075 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027621/0928 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0477 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2011
From: SHLAGENHAFT, ROLF
To: FREESCALE SEMICONDUCTOR INC
Reel/Frame 026201/0978 →