IP Library Granted Patent US 8,530,953
Granted Patent B2
US 8,530,953 · App. 13/129,505 · Granted Sep 10, 2013

Power MOS transistor device and switch apparatus comprising the same

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Quick Facts
Patent No.
US 8,530,953
App. No.
13/129,505
Granted
Sep 10, 2013
Kind
B2
Abstract

A transistor power switch device comprising an array of vertical transistor elements for carrying current between the first and second faces of a semiconductor body and a vertical avalanche diode electrically in parallel with the array of vertical transistors. The array of transistor elements includes at the first face an array of source regions of a first semiconductor type, at least one p region of a second semiconductor type opposite to the first type interposed between the source regions and the second face, at least one control electrode for switchably controlling flow of the current through the p region, and a conductive layer contacting the source regions and insulated from the control electrode. The vertical avalanche diode is configured to conduct breakdown current between the first and second faces in the off state of the device and having a first current carrying diode region of the second semiconductor type in contact with the first face and with the conductive layer and a second semiconductor region of the first semiconductor type electrically connected with the second face.

Claims (54)

1. A transistor power switch device comprising:

a semiconductor body presenting opposite first and second faces;

an array of vertical transistor elements for carrying current between said first and second faces, wherein said array of vertical transistor elements comprises

at said first face an array of first current carrying transistor regions of a first semiconductor type,

at least one second current carrying transistor region of a second semiconductor type opposite to said first type interposed between said first semiconductor regions and said second face, and

at least one control electrode for switchably enabling flow of said current through said second transistor region in a forward direction in an on state of the transistor power switch device and switching off said flow of said current in an off state of the transistor power switch device; and

a conductive layer contacting said first current carrying transistor regions and insulated from said control electrode by at least one insulating layer; and,

at least one vertical avalanche diode in said semiconductor body electrically in parallel with said array of vertical transistor elements arranged so that said avalanche diode as well as said array of vertical transistor elements conduct breakdown avalanche current between said first and second faces in the off state of the transistor power switch device, wherein

said vertical avalanche diode is reverse biased in said on state of the transistor power switch device, and

said vertical avalanche diode comprises a first current carrying diode region of said second semiconductor type in contact with said first face and with said conductive layer and a second semiconductor region of said first semiconductor type electrically connected with said second face.

2. The transistor power switch device as claimed in claim 1 further comprising: an electrical connection lead bonded to said conductive layer at a position over said first current carrying diode region.

3. The transistor power switch device as claimed in claim 2 wherein said electrical connection lead comprises a wire extending away from said conductive layer configured to dissipate heat from said diode.

4. The transistor power switch device as claimed in claim 2 wherein said electrical connection lead comprises a contact bump on top of said conductive layer configured to dissipate heat from said diode.

5. The transistor power switch device as claimed in claim 2 further comprising:

in said semiconductor body, a plurality of said reverse biased avalanche diodes, wherein at least one of said electrical connection leads is bonded to said conductive layer over said first current carrying diode regions of each of said avalanche diodes.

6. The transistor power switch device as claimed in claim 4 , wherein at least one of said electrical connection leads is bonded to said conductive layer at a plurality of positions over said first current carrying diode regions of more than one of said avalanche diodes.

7. The transistor power switch device as claimed in claim 2 , wherein said reverse biased avalanche diode has a breakdown voltage less than said vertical transistor elements of said array.

8. The transistor power switch device as claimed in claim 2 , wherein

said array of transistor elements further-comprises

a lightly doped high voltage region of said second semiconductor type, and

an array of more heavily doped regions of said second semiconductor type within said lightly doped high voltage region; and

said reverse biased avalanche diode further comprises

a lightly doped body region of said second semiconductor type, and

a more heavily doped region of said second semiconductor type within said lightly doped body region, said lightly doped body region and said more heavily doped region of said reverse biased avalanche diode having been formed simultaneously with the corresponding regions of said transistor elements.

9. The transistor power switch device as claimed in claim 3 further comprising:

in said semiconductor body, a plurality of said reverse biased avalanche diodes, wherein at least one of said electrical connection leads is bonded to said conductive layer over said first current carrying diode regions of each of said avalanche diodes.

10. The transistor power switch device as claimed in claim 5 , wherein said reverse biased avalanche diode has a breakdown voltage less than said vertical transistor elements of said array.

11. The transistor power switch device as claimed in claim 1 , wherein said first current carrying transistor regions each contact said conductive layer over an area substantially less than an area over which said first current carrying diode region of said reverse biased avalanche diode contacts said conductive layer.

12. The transistor power switch device as claimed in claim 11 , wherein said reverse biased avalanche diode has an area at said first face more than an order of magnitude greater than each of said transistor elements.

13. The transistor power switch device as claimed in claim 11 , wherein

said array of transistor elements further-comprises

a lightly doped high voltage region of said second semiconductor type, and

an array of more heavily doped regions of said second semiconductor type within said lightly doped high voltage region; and

said reverse biased avalanche diode further comprises

a lightly doped body region of said second semiconductor type, and

a more heavily doped region of said second semiconductor type within said lightly doped body region, said lightly doped body region and said more heavily doped region of said reverse biased avalanche diode having been formed simultaneously with the corresponding regions of said transistor elements.

14. The transistor power switch device as claimed in claim 1 , wherein said reverse biased avalanche diode has a breakdown voltage less than said vertical transistor elements of said array.

15. The transistor power switch device as claimed in claim 1 , wherein

said array of vertical transistor elements further comprises

a lightly doped high voltage region of said second semiconductor type, and

an array of more heavily doped regions of said second semiconductor type within said lightly doped high voltage region; and

said reverse biased avalanche diode further comprises

a lightly doped body region of said second semiconductor type, and

a more heavily doped region of said second semiconductor type within said lightly doped body region, said lightly doped body region and said more heavily doped region of said reverse biased avalanche diode having been formed simultaneously with the corresponding regions of said vertical transistor elements.

16. The transistor power switch device as claimed in claim 1 wherein said vertical transistor elements comprise:

field-effect transistors whose first current carrying transistor regions comprise source regions, whose second current carrying transistor regions comprise at least one body region, whose control electrodes comprise at least one gate electrode, and which comprise at least one drain region electrically connected with said second face; and

said at least one insulating layer including a layer insulating said control electrode from said first and second current carrying transistor regions of said vertical transistor elements and layers insulating said control electrode from said at least one conductive layer.

17. The transistor power switch device as claimed in claim 16 wherein said source region of each of said vertical transistor elements contacting said conductive layer comprises:

a plurality of arms extending radially at said first face towards an arm of a source region of an adjacent vertical transistor element of said array;

said at least one body region extending around and under said arms of said source regions and merging between said vertical transistor elements to form a continuous body region; and

said at least one body region extending up within each of said source regions to contact said conductive layer at said first face at a contact position adjacent an end of each of said arms of said source regions.

18. The transistor power switch device as claimed in claim 17 wherein said at least one body region also extends up within each of said source regions to contact said conductive layer at said first face at a contact position central to each of said source regions of said vertical transistor elements.

19. The transistor power switch device as claimed in claim 17 , wherein said end of each of said arms of said source regions is enlarged at said first face around said contact position.

20. A power switch apparatus comprising the transistor power switch device as claimed in claim 1 and a voltage supply for applying operating voltages to said transistor power switch device.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0334 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0387 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0477 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0075 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027621/0928 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2011
From: REYNES, JEAN MICHEL; BERNOUX, BEATRICE; ESCOFFIER, RENE; JALBAUD, PIERRE; DERAM, IVANA
To: FREESCALE SEMICONDUCTOR INC
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