IP Library Granted Patent US 8,735,261
Granted Patent B2
US 8,735,261 · App. 13/130,160 · Granted May 27, 2014

Method and system for stripping the edge of a semiconductor wafer

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Quick Facts
Patent No.
US 8,735,261
App. No.
13/130,160
Granted
May 27, 2014
Kind
B2
Abstract

A method and a system are described herein for applying etchant to edges of a plurality of wafers. The system includes a sump configured for holding etchant, a roller having an outer surface in fluid communication with the sump and configured to have etchant thereon, a wafer cassette configured to retain wafers positioned therein so that edges of the wafers are in contact with the roller. The cassette permits axial rotation of the wafers about an axis. A method of applying etchant to the edge of the wafer includes placing the wafer edge in contact with the roller and rotating the roller about a longitudinal axis of the roller. At least a portion of the roller contact an etchant contained in a sump during rotation so that etchant is applied to the wafer edge.

Claims (18)

1. A wafer edge etchant application system for applying etchant to edges of a plurality of wafers, the system comprising:

a sump configured for holding the etchant;

a roller having an outer surface in fluid communication with the sump, the roller configured to have etchant thereon, the wafers are restrained from coming into direct contact with the etchant in the sump by the roller; and

a wafer cassette configured to retain wafers positioned therein so that edges of the wafers are in contact with the roller, the cassette permitting axial rotation of the wafers about an axis.

2. The system of claim 1 wherein at least some of the wafers have a handle oxide in a terrace region, the system configured to strip the handle oxide from the terrace region to inhibit nodule growth in the terrace region.

3. The system of claim 1 wherein at least a portion of the roller is disposed in the sump.

4. The system of claim 1 wherein the roller has a longitudinal axis and wherein the roller is operable to rotate about its longitudinal axis.

5. The system of claim 3 wherein the roller is configured to retain at least a portion of the etchant that it comes in contact with in the sump.

6. The system of claim 1 wherein the wafer cassette is configured to hold a plurality of wafers positioned therein.

7. The system of claim 1 wherein the wafer cassette is configured to permit axial rotation of the wafers positioned therein about an axis perpendicular to a planar surface of the wafers, wherein the axis of the wafers is perpendicular to a longitudinal axis of the roller.

8. The system of claim 6 wherein the wafer cassette is configured to permit contact with a circumferential edge of each wafer along the outer surface of the roller.

9. The system of claim 1 wherein the outer surface of the roller is configured to retain at least some of the etchant it comes in contact with in the sump.

10. The system of claim 9 wherein the outer surface of the roller is mechanically modified to increase the amount of etchant retained by the outer surface.

11. The system of claim 8 further comprising an opening formed in the wafer cassette generally adjacent to the outer surface of the roller.

12. The system of claim 11 wherein the opening formed in the wafer cassette permits contact between the circumferential edge of each wafer with the outer surface of the roller.

13. The system of claim 1 further comprising a cover disposed over at least a portion of the outer surface of the roller.

14. The system of claim 13 wherein the cover is configured to retain at least some of the etchant it comes in contact with in the sump.

15. The system of claim 13 wherein the cover is removable.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2018
From: SUNEDISON SEMICONDUCTOR LIMITED; MEMC JAPAN LIMITED; MEMC ELECTRONIC MATERIALS S.P.A.
To: GLOBALWAFERS CO., LTD.
Reel/Frame 046327/0001 →
NOTICE OF LICENSE AGREEMENT Recorded Jun 6, 2014
From: SUNEDISON SEMICONDUCTOR LIMITED
To: SUNEDISON SEMICONDUCTOR TECHNOLOGY PTE. LTD.
Reel/Frame 033099/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2014
From: MEMC ELECTRONIC MATERIALS, INC.
To: SUNEDISON SEMICONDUCTOR LIMITED (UEN201334164H)
Reel/Frame 033023/0430 →
RELEASE OF SECURITY INTEREST Recorded Mar 3, 2014
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: NVT, LLC; SUN EDISON LLC; SOLAICX; SUNEDISON, INC.
Reel/Frame 032382/0724 →
SECURITY AGREEMENT Recorded Jan 30, 2014
From: SUNEDISON, INC.; SOLAICX; SUN EDISON, LLC; NVT, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 032177/0359 →
RELEASE OF SECURITY INTEREST Recorded Dec 26, 2013
From: GOLDMAN SACHS BANK USA
To: NVT, LLC; SUN EDISON LLC; SOLAICX; SUNEDISON, INC. (F/K/A MEMC ELECTRONIC MATERIALS, INC.)
Reel/Frame 031870/0092 →
SECURITY AGREEMENT Recorded Oct 1, 2012
From: NVT, LLC; SUN EDISON LLC; SOLAICX, INC.; MEMC ELECTRONIC MATERIALS, INC.
To: GOLDMAN SACHS BANK USA
Reel/Frame 029057/0810 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2011
From: STANDLEY, ROBERT W.
To: MEMC ELECTRONIC MATERIALS, INC.
Reel/Frame 026308/0502 →