IP Library Assignment 033023/0430
Patent Assignment
Reel/Frame 033023/0430

Assignment of Assignor's Interest

Recorded: 2014-05-27 Pages: 35
Assignor
MEMC ELECTRONIC MATERIALS, INC.
Executed: 2014-05-23
Assignee
SUNEDISON SEMICONDUCTOR LIMITED (UEN201334164H)
9 BATTERY ROAD, #15-01 STRAITS TRADING BUILDING, SINGAPORE, 049910, SINGAPORE
Covered Properties (274)
Semiconductor Wafer Polishing Apparatus and Method
Patent: 5,605,487 →
Application: 08/242,560 →
Method of Rough Polishing Semiconductor Wafers to Reduce Surface Roughness
Patent: 5,571,373 →
Application: 08/245,592 →
Method for Etching a Semiconductor Material Without Altering Flow Pattern Defect Distribution
Patent: 5,573,680 →
Application: 08/283,782 →
Precision Controlled Precipitation of Oxygen in Silicon
Patent: 5,593,494 →
Application: 08/403,301 →
Susceptor and Baffle Therefor
Patent: 5,518,549 →
Application: 08/423,363 →
Method for Controlling Growth of a Silicon Crystal
Patent: 5,653,799 →
Application: 08/459,765 →
A Silicon Single Crystal Having Eliminated Disclocation in Its Neck Crystal
Patent: 5,578,284 →
Application: 08/483,304 →
Apparatus for Rotating a Crucible of a Crystal Pulling Machine
Patent: 5,593,498 →
Application: 08/488,924 →
Surface-Treated Crucibles for Improved Zero Dislocation Performance
Patent: 5,976,247 →
Application: 08/490,465 →
Methods for Improving Zero Dislocation Yield of Single Crystals
Patent: 5,980,629 →
Application: 08/490,473 →
Method for Preparing Molten Silicon Melt from Polycrystalline Silicon Charge
Patent: 5,588,993 →
Application: 08/507,055 →
Method for Tuning Barrel Reactor Purge System
Patent: 5,908,504 →
Application: 08/530,612 →
Non-Distorting Video Camera for Use with a System for Controlling Growth of a Silicon Crystal
Patent: 5,656,078 →
Application: 08/558,609 →
Pre-Thermal Treatment Cleaning Process
Patent: 5,712,198 →
Application: 08/568,997 →
Apparatus for Controlling Nucleation of Oxygen Precipitates in Silicon Crystals
Patent: 5,840,120 →
Application: 08/589,612 →
Method for Preparing Molten Silicon Melt from Polycrystalline Silicon Charge
Patent: 5,814,148 →
Application: 08/595,075 →
System for Controlling Growth of a Silicon Crystal
Patent: 5,665,159 →
Application: 08/620,137 →
Apparatus and Method for Shaping Polishing Pads
Patent: 5,840,202 →
Application: 08/639,185 →
Method and Apparatus for Aiming a Barrel Reactor Nozzle
Patent: 5,843,234 →
Application: 08/644,181 →
Automated Wafer Lapping System
Patent: 5,679,055 →
Application: 08/653,666 →
Process for Eliminating Dislocations in the Neck of a Silicon Single Crystal
Patent: 5,628,823 →
Application: 08/675,550 →
Cooling System and Method for Epitaxial Barrel Reactor
Patent: 5,849,076 →
Application: 08/686,565 →
Polysilicon Particle Classifying Apparatus
Patent: 5,791,493 →
Application: 08/686,570 →
Method and Apparatus for Controlling Flatness of Polished Semiconductor Wafer
Patent: 5,787,595 →
Application: 08/689,432 →
Process for Controlling Thermal History of Czochralski-Grown Silicon
Patent: 5,779,791 →
Application: 08/694,157 →
Cutting Machine
Patent: 5,827,113 →
Application: 08/710,655 →
Sio Probe for Real-Time Monitoring and Control of Oxygen During Czochralski Growth of Single Crystal Silicon
Patent: 5,795,381 →
Application: 08/711,085 →
A Method for Rotating a Crucible of a Crystal Pulling Machine
Patent: 5,766,341 →
Application: 08/725,861 →
Process for Controlling the Oxygen Content in Silicon Wafers Heavily Doped with Antimony or Arsenic
Patent: 5,904,768 →
Application: 08/732,527 →
Gettering Agent
Patent: 5,855,859 →
Application: 08/739,550 →
Polishing Block Heater
Patent: 5,770,522 →
Application: 08/764,458 →
Apparatus for Cleaning Semiconductor Wafers
Patent: 5,816,274 →
Application: 08/843,632 →
Secondary Edge Reflector for Horizontal Reactor
Patent: 5,792,273 →
Application: 08/863,960 →
Method and Apparatus for Cutting an Ingot
Patent: 6,006,738 →
Application: 08/895,388 →
Method and System for Controlling Growth of a Silicon Crystal
Patent: 5,846,318 →
Application: 08/896,177 →
Heat Shield Assembly and Method of Growing Vacancy Rich Single Crystal Silicon
Patent: 5,942,032 →
Application: 08/904,943 →
Non-Dash Neck Method for Single Crystal Silicon Growth
Patent: 5,885,344 →
Application: 08/907,795 →
Process for the Preparation of Silicon Wafers Having a Controlled Distribution of Oxygen Precipitate Nucleation Centers
Patent: 5,882,989 →
Application: 08/934,946 →
Method and System for Controlling Growth of a Silicon Crystal
Patent: 5,882,402 →
Application: 08/939,802 →
Heat Shield for Crystal Puller
Patent: 5,922,127 →
Application: 08/940,166 →
Wafer Demount Apparatus
Patent: 5,865,670 →
Application: 08/941,777 →
Radiant Polishing Block Heater
Patent: 5,906,533 →
Application: 08/950,842 →
Apparatus for Cleaning Semiconductor Wafers
Patent: 5,839,460 →
Application: 08/970,129 →
Post-Lapping Cleaning Process for Silicon Wafers
Patent: 5,837,662 →
Application: 08/990,123 →
Method and Apparatus for Washing Silicon Ingot with Water to Remove Particulate Matter
Patent: 6,006,736 →
Application: 09/000,061 →
Crystal Growing Apparatus with Melt-Doping Facility
Patent: 6,019,838 →
Application: 09/002,592 →
Situ Wafer Cleaning Process
Patent: 5,990,014 →
Application: 09/003,986 →
Crucible and Method of Preparation Thereof
Patent: 5,913,975 →
Application: 09/017,942 →
Ideal Oxygen Precipitating Silicon Wafers and Oxygen Out-Diffusion- Less Process Therefor
Patent: 6,180,220 →
Application: 09/030,110 →
Low Defect Density, Ideal Oxygen Precipitating Silicon
Patent: 6,190,631 →
Application: 09/057,800 →
Low Defect Density Self-Interstitial Dominated Silicon
Patent: 6,254,672 →
Application: 09/057,801 →
Low Defect Density Vacancy Dominated Silicon
Patent: 5,919,302 →
Application: 09/057,851 →
Low Defect Density Silicon
Patent: 6,287,380 →
Application: 09/057,907 →
Injector for Reactor
Patent: 5,891,250 →
Application: 09/072,564 →
Process for the Removal of Copper and Other Metallic Impurities from Silicon
Patent: 6,482,269 →
Application: 09/082,906 →
Electrical Resistance Heater for Crystal Growing Apparatus
Patent: 6,093,913 →
Application: 09/092,391 →
Collector for an Automated on-Line Bath Analysis System
Patent: 6,210,640 →
Application: 09/093,520 →
Process and Appratus for Preparation of Silicon Crystals with Reduced Metal Content
Patent: 6,183,553 →
Application: 09/097,779 →
Susceptor for Barrel Reactor
Patent: 6,129,048 →
Application: 09/107,728 →
Continuous Oxidation Process for Crystal Pulling Apparatus
Patent: 6,039,801 →
Application: 09/167,747 →
Method and System for Controlling Growth of a Silicon Crystal
Patent: 6,171,391 →
Application: 09/172,546 →
Heat Shield for Crystal Puller
Patent: 6,053,974 →
Application: 09/234,144 →
Tungsten Doped Crucible and Method for Preparing Same
Patent: 6,187,089 →
Application: 09/245,238 →
An Epitaxial Silicon Wafer with Intrinsic Gettering
Patent: 6,284,384 →
Application: 09/250,908 →
Heat Shield Assembly for Crystal Puller
Patent: 6,197,111 →
Application: 09/258,478 →
Apparatus for Controlling the Oxygen Content in Silicon Wafers Heavily Doped with Antimony or Arsenic
Patent: 6,214,109 →
Application: 09/268,968 →
Vacancy Dominated, Defect-Free Silicon
Patent: 6,379,642 →
Application: 09/270,366 →
Method for Processing a Semiconductor Wafer
Patent: 6,227,944 →
Application: 09/276,278 →
Method and System of Controlling Taper Growth in a Semiconductor Crystal Growth Process
Patent: 6,241,818 →
Application: 09/287,916 →
Process for Preparing Defect Free Silicon Crystals Which Allows for Variability in Process Conditions
Patent: 6,312,516 →
Application: 09/344,036 →
Publication: US 2001/0003268
Process for Growth of Defect Free Silicon Crystals of Arbitrarily Large Diameters
Patent: 6,328,795 →
Application: 09/344,709 →
Publication: US 2001/0008114
Process for Fabricating Semiconductor Wafers with External Gettering
Patent: 6,338,805 →
Application: 09/352,980 →
Method of Processing Semiconductor Wafers
Patent: 6,114,245 →
Application: 09/356,616 →
Non-Uniform Minority Carrier Lifetime Distributions in High Performance Silicon Power Devices
Patent: 6,828,690 →
Application: 09/366,850 →
Non-Oxygen Precipitating Czochralski Silicon Wafers
Patent: 6,336,968 →
Application: 09/379,383 →
Process for Preparing an Ideal Oxygen Precipitating Silicon Wafer
Patent: 6,191,010 →
Application: 09/384,669 →
Thermally Annealed Wafers Having Improved Internal Gettering
Patent: 6,361,619 →
Application: 09/385,108 →
Silicon on Insulator Structure from Low Defect Density Single Crystal Silicon
Patent: 6,236,104 →
Application: 09/387,288 →
Method of Processing Semiconductor Wafers to Build in Back Surface Damage
Patent: 6,214,704 →
Application: 09/404,428 →
Thermally Annealed, Low Defect Density Single Crystal Silicon
Patent: 6,416,836 →
Application: 09/416,998 →
Epitaxial Silicon Wafers Substantially Free of Grown - in Defects
Patent: 6,284,039 →
Application: 09/417,610 →
Method of Controlling Growth of a Semiconductor Crystal to Automatically Transition from Taper Growth to Target Diameter Growth
Patent: 6,203,611 →
Application: 09/421,187 →
Method of Determining Performance Characteristics of Polishing Pads
Patent: 6,293,139 →
Application: 09/432,928 →
Method for Revealing Agglomerated Intrinsic Point Defects in Semiconductor Crystals
Patent: 6,638,357 →
Application: 09/475,320 →
Publication: US 2002/0007779
Semiconductor Wafer Manufacturing Process
Patent: 6,376,395 →
Application: 09/481,080 →
Publication: US 2002/0004305
Continuous oxidation process for crystal pulling Apparatus
Patent: 6,315,828 →
Application: 09/489,481 →
Method of Controlling Diameter of a Silicon Crystal in a Locked Seed Lift Growth Process
Patent: 6,776,840 →
Application: 09/502,340 →
Process for producing a silicon melt
Patent: 6,344,083 →
Application: 09/503,566 →
Process for Reducing Surface Variations for Polished Wafer
Patent: 6,479,386 →
Application: 09/505,269 →
Semiconductor Wafer Manufacturing Process
Patent: 6,376,335 →
Application: 09/506,105 →
Method for Wafer Processing
Patent: 6,514,423 →
Application: 09/507,811 →
Barium doping of molten silicon for use in crystal growing process
Patent: 6,319,313 →
Application: 09/521,288 →
Strontium doping of molten silicon for use in crystal growing process
Patent: 6,350,312 →
Application: 09/521,525 →
Modified Susceptor for Use in Chemical Vapor Deposition Process
Patent: 6,444,027 →
Application: 09/566,890 →
Process for Preparing Single Crystal Silicon Having Uniform Thermal History
Patent: 6,458,202 →
Application: 09/596,493 →
Method and apparatus for forming an epitaxial silicon wafer with a denuded zone
Patent: 6,339,016 →
Application: 09/607,389 →
Method and Apparatus for Forming a Silicon Wafer with a Denuded Zone
Patent: 6,599,815 →
Application: 09/607,391 →
Non-Contaminating Gas-Tight Valve for Semiconductor Applications
Patent: 6,435,474 →
Application: 09/608,304 →
Method and Apparatus for a Wafer Carrier Having an Insert
Patent: 6,454,635 →
Application: 09/633,958 →
Method for Producing Czochralski Silicon Free of Agglomerated Self-Interstitial Defects
Patent: 6,635,587 →
Application: 09/661,821 →
Process for Detecting Agglomerated Intrinsic Point Defects by Metal Decoration
Patent: 6,391,662 →
Application: 09/661,822 →
Radio frequency identification system and method for tracking silicon wafers
Patent: 6,330,971 →
Application: 09/677,909 →
Method and Apparatus to Place Wafers into and Out of Machine
Patent: 6,398,631 →
Application: 09/681,160 →
Polishing Apparatus, Polishing Head and Method
Patent: 6,712,673 →
Application: 09/682,677 →
Publication: US 2003/0068958
Heat Shield Assembly for Crystal Pulling Apparatus
Patent: 6,482,263 →
Application: 09/684,266 →
Electrical Resistance Heater and Method for Crystal Growing Apparatus
Patent: 6,503,322 →
Application: 09/691,994 →
Ideal Oxygen Precipitating Silicon Wafers and Oxygen Out-Diffusion-Less Process Therefor
Patent: 6,586,068 →
Application: 09/704,893 →
A Process for the Preparation of an Ideal Oxygen Precipitating Silicon Wafer Having an Asymmetrical Vacancy Concentration Profile Capable of Forming an Enhanced Denuded Zone
Patent: 6,579,779 →
Application: 09/704,900 →
Low Defect Density, Ideal Oxygen Precipitating Silicon
Patent: 6,555,194 →
Application: 09/705,092 →
Method for Preparing Molten Silicon Melt from Polycrystalline Silicon Charge
Patent: 6,454,851 →
Application: 09/711,198 →
Defect Classification Using Scattered Light Intensities
Patent: 6,515,742 →
Application: 09/723,847 →
Silicon on insulator structure having a low defect density handle wafer and process for the preparation thereof
Patent: 6,342,725 →
Application: 09/737,715 →
Publication: US 2001/0030348
Semiconductor Wafer Holder
Patent: 6,497,403 →
Application: 09/751,897 →
Publication: US 2002/0084566
Epitaxial Silicon Wafer Free from Autodoping and Backside Halo and a Method and Apparatus for the Preparation Thereof
Patent: 6,596,095 →
Application: 09/752,222 →
Publication: US 2001/0037761
Carrier for Cleaning Silicon Wafers
Patent: 6,520,191 →
Application: 09/807,907 →
Crystal Puller and Method for Growing Monocrystalline Silicon Ingots
Patent: 6,447,601 →
Application: 09/811,982 →
Heat Shield Assembly for Crystal Puller
Patent: 6,579,362 →
Application: 09/815,508 →
Publication: US 2002/0134302
Low Defect Density, Self-Interstitial Dominated Silicon
Patent: 6,409,826 →
Application: 09/816,015 →
Publication: US 2001/0025597
Low Defect Density Silicon and a Process for Producing Low Defect Density Silicon Wherein V/G0 Is Controlled by Controlling Heat Transfer at the Melt/Solid Interface
Patent: 6,409,827 →
Application: 09/833,777 →
Publication: US 2001/0020437
Process for Growing Silicon Crystals Which Allows for Variability in Process Conditions While Suppressing the Formation of Agglomerated Intrinsic Point Defects
Patent: 6,500,255 →
Application: 09/853,232 →
Publication: US 2001/0027743
Epitaxial Silicon Wafer with Intrinsic Gettering and a Method for the Preparation Thereof
Patent: 6,537,655 →
Application: 09/859,094 →
Publication: US 2001/0032581
Barium Doping of Molten Silicon for Use in Crystal Growing Process
Patent: 6,461,427 →
Application: 09/859,826 →
Publication: US 2001/0032580
Process for Preparing Low Defect Density Silicon Using High Growth Rates
Patent: 6,689,209 →
Application: 09/871,255 →
Publication: US 2002/0053315
An Epitaxial Wafer Substantially Free of Grown-in Defects
Patent: 6,565,649 →
Application: 09/874,487 →
Publication: US 2001/0039916
Crystal Puller and Method for Growing Monocrystalline Silicon Ingots
Patent: 6,663,709 →
Application: 09/892,002 →
Publication: US 2002/0195045
Method and Apparatus for Processing a Semiconductor Wafer Using Novel Final Polishing Method
Patent: 6,709,981 →
Application: 09/928,559 →
Publication: US 2002/0052064
Process for the Preparation of Non-Oxygen Precipitating Czochralski Silicon Wafers
Patent: 6,432,197 →
Application: 09/929,585 →
Publication: US 2002/0000185
Process for Preparing a Silicon Melt
Patent: 6,652,645 →
Application: 09/943,600 →
Publication: US 2002/0020339
Method for the Production of Low Defect Density Silicon
Patent: 6,858,307 →
Application: 09/972,608 →
Publication: US 2002/0056410
Vacancy, Dominated, Defect-Free Silicon
Patent: 6,840,997 →
Application: 10/000,545 →
Publication: US 2002/0078880
Method for Controlling Growth of a Silicon Crystal to Minimize Growth Rate and Diameter Deviations
Patent: 6,726,764 →
Application: 10/008,812 →
Publication: US 2002/0043206
Process for Reclaiming Semiconductor Wafers and Reclaimed Wafers
Patent: 7,008,874 →
Application: 10/022,967 →
Publication: US 2002/0086539
Granular Semiconductor Material Transport System and Process
Patent: 6,609,870 →
Application: 10/035,456 →
Publication: US 2003/0077128
Process for Growing Defect-Free Silicon Wherein the Grown Silicon Is Cooled in a Separate Chamber
Patent: 6,562,123 →
Application: 10/035,540 →
Publication: US 2002/0092460
Process for Producing a Silicon Melt
Patent: 6,749,683 →
Application: 10/036,875 →
Publication: US 2002/0083887
SOI structure having a device layer which is vacancy dominated and substantially free fo agglomerated vacancy type defects
Patent: 6,849,901 →
Application: 10/038,084 →
Publication: US 2002/0113265
Single Crystal Silicon Having Improved Gate Oxide Integrity
Patent: 6,986,925 →
Application: 10/039,196 →
Publication: US 2002/0121238
Low Defect Density Silicon Having a Vacancy-Dominated Core Substantially Free of Oxidation Induced Stacking Faults
Patent: 6,846,539 →
Application: 10/054,629 →
Publication: US 2002/0100410
Process for Producing Thermally Annealed Wafers Having Improved Internal Gettering
Patent: 6,686,260 →
Application: 10/067,070 →
Publication: US 2002/0170631
Thermal Annealing Process for Producing Low Defect Density Single Crystal Silicon
Patent: 6,743,289 →
Application: 10/073,506 →
Publication: US 2002/0083889
Thermal Annealing Process for Producing Silicon Wafers with Improved Surface Characteristics
Patent: 6,743,495 →
Application: 10/113,378 →
Publication: US 2002/0174828
Control of Oxygen Precipitate Formation in High Resistivity Cz Silicon
Patent: 6,897,084 →
Application: 10/120,714 →
Publication: US 2003/0054641
Low Defect Density Regions of Self-Interstitial Dominated Silicon
Patent: 6,605,150 →
Application: 10/135,174 →
Publication: US 2002/0139294
Low Defect Density Epitaxial Wafer and a Process for the Preparation Thereof
Patent: 6,632,278 →
Application: 10/135,597 →
Publication: US 2002/0170485
Silicon on Insulator Struture Having an Epitaxial Layer and Intrinsic Gettering
Patent: 6,930,375 →
Application: 10/177,444 →
Publication: US 2003/0008435
Controlled Neck Growth Process for Single Crystal Silicon
Patent: 6,869,477 →
Application: 10/204,654 →
Publication: US 2003/0209186
Non-Oxygen Precipitating Czochralski Silicon Wafers
Patent: 6,709,511 →
Application: 10/217,703 →
Publication: US 2002/0189528
Modified Susceptor for Use in Chemical Vapor Deposition Process
Patent: 6,652,650 →
Application: 10/229,415 →
Publication: US 2003/0041799
Crystal Puller for Growing Monocrystalline Silicon Ingots
Patent: 6,554,898 →
Application: 10/254,945 →
Publication: US 2003/0024473
A Single Crystal Silicon Ingot Having a High Arsenic Concentration
Patent: 7,132,091 →
Application: 10/256,759 →
Publication: US 2003/0061985
Process for Growing a Silicon Crystal Segment Substantially Free from Agglomerated Intrinsic Point Defects Which Allows for Variability in the Process Conditions
Patent: 6,652,646 →
Application: 10/260,239 →
Publication: US 2003/0116081
Seed Crystals for Pulling Single Crystal Silicon
Patent: 6,866,713 →
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Publication: US 2003/0079673
Ideal Oxygen Precipitating Silicon Wafers with Nitrogen/Carbon Stabilized Oxygen Precipitate Nucleation Centers and Process for Making the Same
Patent: 6,808,781 →
Application: 10/328,481 →
Publication: US 2003/0136961
Process for Producing Low Defect Density, Ideal Oxygen Precipitating Silicon
Patent: 6,896,728 →
Application: 10/373,899 →
Publication: US 2004/0025782
Nitrogen-Doped Silicon Substantially Free of Oxidation Induced Stacking Faults
Patent: 7,182,809 →
Application: 10/380,806 →
Publication: US 2004/0009111
Epitaxial Silicon Wafer with Intrinsic Gettering and a Method for the Preparation Thereof
Patent: 6,958,092 →
Application: 10/400,594 →
Publication: US 2005/0098092
Ideal Oxygen Precipitating Silicon Wafers and Oxygen Out-Diffusion-Less Process Therefor
Patent: 6,849,119 →
Application: 10/430,798 →
Publication: US 2003/0196586
Process for Cooling a Silicon Ingot Having a Vacancy Dominated Region to Produce Defect Free Silicon
Patent: 6,913,647 →
Application: 10/437,141 →
Publication: US 2004/0003770
Single Crystal Silicon Wafer Having an Epitaxial Layer Substantially Free from Grown-in Defects
Patent: 7,097,718 →
Application: 10/441,413 →
Publication: US 2003/0205191
Wafer Carrier
Patent: 7,008,308 →
Application: 10/442,900 →
Publication: US 2004/0235402
Process for the Preparation of an Ideal Oxygen Precipitating Silicon Wafer Capable of Forming an Enhanced Denuded Zone
Patent: 6,713,370 →
Application: 10/460,901 →
Publication: US 2003/0221609
Fluid Sealing System for a Crystal Puller
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Application: 10/465,528 →
Publication: US 2004/0255847
Wafer Clamping Device for a Double Side Grinder
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Publication: US 2008/0020684
Process for Preparing a Stabilized Ideal Oxygen Precipitating Silicon Wafer
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Application: 10/615,127 →
Publication: US 2005/0005841
Method to Monitor and Control the Crystal Cooling or Quenching Rate by Measuring Crystal Surface Temperature
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Application: 10/623,967 →
Publication: US 2005/0016443
Process for Preparing Single Crystal Silicon Using Crucible Rotation to Control Temperature Gradient
Patent: 7,125,450 →
Application: 10/699,038 →
Publication: US 2004/0118333
Crystal Puller and Method for Growing a Monocrystalline Ingot
Patent: 8,147,613 →
Application: 10/705,813 →
Publication: US 2004/0112277
Process for Metallic Contamination Reduction in Silicon Wafers
Patent: 7,084,048 →
Application: 10/840,854 →
Publication: US 2005/0250297
Partially Devitrified Crucible
Patent: 7,497,907 →
Application: 10/898,148 →
Publication: US 2006/0016389
High Purity Silicon Carbide Structures
Patent: 7,888,685 →
Application: 10/900,938 →
Publication: US 2006/0024969
Process for Making Non-Uniform Minority Carrier Lifetime Distribution in High Performance Silicon Power Devices
Patent: 7,242,037 →
Application: 10/911,965 →
Publication: US 2005/0006796
Systems and Methods for Measuring and Reducing Dust in Granular Material
Patent: 7,291,222 →
Application: 10/930,654 →
Publication: US 2005/0279277
Process for Making Silicon Wafers with Stabilized Oxygen Precipitate Nucleation Centers
Patent: 7,201,800 →
Application: 10/963,340 →
Publication: US 2005/0048247
Low Defect Density Silicon Having a Vacancy-Dominated Core Substantially Free of Oxidation Induced Stacking Faults
Patent: 7,217,320 →
Application: 11/005,987 →
Publication: US 2005/0150445
Controlling Melt-Solid Interface Shape of a Growing Silicon Crystal Using a Variable Magnetic Field
Patent: 7,223,304 →
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Publication: US 2006/0144321
Electromagnetic Pumping of Liquid Silicon in a Crystal Growing Process
Patent: 7,291,221 →
Application: 11/027,360 →
Publication: US 2006/0144320
Semiconductor Wafer Boat for a Vertical Furnace
Patent: 7,033,168 →
Application: 11/041,593 →
Method for the Production of Low Defect Density Silicon
Patent: 7,105,050 →
Application: 11/058,885 →
Publication: US 2005/0132948
Low Defect Density, Ideal Oxygen Precipitating Silicon
Patent: 7,229,693 →
Application: 11/058,996 →
Publication: US 2005/0170610
Method for Controlling of Thermal Donor Formation in High Resistivity Cz Silicon
Patent: 7,135,351 →
Application: 11/082,267 →
Publication: US 2005/0158969
Process for Preparing Single Crystal Silicon Having Improved Gate Oxide Integrity
Patent: 7,431,765 →
Application: 11/089,102 →
Publication: US 2005/0160967
Modified Susceptor for Barrel Reactor
Patent: 7,462,246 →
Application: 11/107,444 →
Publication: US 2006/0231035
Silicon Wafer Etching Process and Composition
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Application: 11/152,362 →
Publication: US 2006/0011588
Melter Assembly and Method for Charging a Crystal Forming Apparatus with Molten Source Material
Patent: 7,465,351 →
Application: 11/155,104 →
Publication: US 2005/0279275
Melter Assembly and Method for Charging a Crystal Forming Apparatus with Molten Source Material
Patent: 7,344,594 →
Application: 11/155,105 →
Publication: US 2005/0279276
Melter Assembly and Method for Charging a Crystal Forming Apparatus with Molten Source Material
Patent: 7,691,199 →
Application: 11/155,385 →
Publication: US 2005/0279278
Process for Producing Silicon on Insulator Structure Having Intrinsic Gettering by Ion Implantation
Patent: 7,071,080 →
Application: 11/174,908 →
Publication: US 2005/0255671
Arsenic and Phosphorus Doped Silicon Wafer Substrates Having Intrinsic Gettering
Patent: 7,485,928 →
Application: 11/270,790 →
Publication: US 2007/0105279
Silicon Structures with Improved Resistance to Radiation Events
Patent: 7,566,951 →
Application: 11/408,503 →
Publication: US 2007/0249136
High Resistivity Silicon Structure and a Process for the Preparation Thereof
Patent: 7,521,382 →
Application: 11/436,688 →
Publication: US 2006/0263967
Method of Polishing a Semiconductor Wafer
Patent: 7,559,825 →
Application: 11/614,129 →
Publication: US 2008/0153391
Double Side Wafer Grinder and Methods for Assessing Workpiece Nanotopology
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Publication: US 2007/0179659
Double Side Wafer Grinder and Methods for Assessing Workpiece Nanotopology
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Wire Saw Ingot Slicing System and Method with Ingot Preheating, Web Preheating, Slurry Temperature Control and/or Slurry Flow Rate Control
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Nitrogen-Doped Silicon Substantially Free of Oxidation Induced Stacking Faults
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Silicon Material with Controlled Agglomerated Point Defects and Oxygen Clusters Induced by the Lateral Surface
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Process for Forming Low Defect Density, Ideal Oxygen Precipitating Silicon
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Controlling Melt-Solid Interface Shape of a Growing Silicon Crystal Using a Variable Magnetic Field
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Method for Purifying Silicon Carbide Coated Structures
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Non-Uniform Minority Carrier Lifetime Distributions in High Performance Silicon Power Devices
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Dressing a Wafer Polishing Pad
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Epitaxial Barrel Susceptor Having Improved Thickness Uniformity
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Semiconductor Wafer Carrier Blade
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Nanotopography Control and Optimization Using Feedback from Warp Data
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Silicon Wafer Etching Compositions
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Method and Device for Feeding Arsenic Dopant into a Silicon Crystal Growing Apparatus
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Semiconductor Wafer Polishing Apparatus and Method of Polishing
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Low Thermal Mass Semiconductor Wafer Support
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Method and Device for Continuously Measuring Silicon Island Elevation
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Wafer Holder for Supporting a Semiconductor Wafer During a Thermal Treatment Process
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Arsenic and Phosphorus Doped Silicon Wafer Substrates Having Intrinsic Gettering
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System and Method for Dressing a Wafer Polishing Pad
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Edge Etching Apparatus for Etching the Edge of a Silicon Wafer
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Methods for Etching the Edge of a Silicon Wafer
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Edge Etched Silicon Wafers
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Methods for Preparing a Semiconductor Structure for Use in Backside Illumination Applications
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Controlling a Melt-Solid Interface Shape of a Growing Silicon Crystal Using an Unbalanced Magnetic Field and Iso-Rotation
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Generating a Pumping Force in a Silicon Melt by Applying a Time-Varying Magnetic Field
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Method for Feeding Arsenic Dopant into a Silicon Crystal Growing Apparatus
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Method for Assessing Workpiece Nanotopology Using a Double Side Wafer Grinder
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Methods for Generating Representations of Flatness Defects on Wafers
Patent: 8,165,706 →
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Systems for Generating Representations of Flatness Defects on Wafers
Patent: 8,340,801 →
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Systems for Weighing a Pulled Object
Patent: 8,691,008 →
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Systems for Weighing a Pulled Object Having a Changing Weight
Patent: 8,347,740 →
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Publication: US 2010/0242625
Wafer Support Ring
Patent: 8,420,554 →
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Publication: US 2011/0269316
Method and System for Processing Abrasive Slurry
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Publication: US 2011/0017230
Semiconductor and Solar Wafers
Patent: 8,310,031 →
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Publication: US 2012/0025353
Methods and Systems for Adjusting Operation of a Wafer Grinder Using Feedback from Warp Data
Patent: 8,145,342 →
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Publication: US 2011/0045740
Methods of Grinding Semiconductor Wafers Having Improved Nanotopology
Patent: 8,267,745 →
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Publication: US 2011/0101504
Process for Annealing Semiconductor Wafers with Flat Dopant Depth Profiles
Patent: 8,153,538 →
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Methods for Monitoring the Amount of Contamination Imparted into Semiconductor Wafers During Wafer Processing
Patent: 8,143,078 →
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Publication: US 2011/0151592
Methods for Processing Silicon on Insulator Wafers
Patent: 8,080,464 →
Application: 12/971,788 →
Publication: US 2011/0159668
Method for the Preparation of a Multi-Layered Crystalline Structure
Patent: 8,367,519 →
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Publication: US 2011/0159665
Semiconductor Wafers with Reduced Roll-Off and Bonded and Unbonded Soi Structures Produced from Same
Patent: 8,330,245 →
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Publication: US 2011/0204471
Methods for Reducing the Width of the Unbonded Region in Soi Structures
Patent: 8,440,541 →
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Publication: US 2011/0207246
Hydrostatic Pad Pressure Modulation in a Simultaneous Double Side Wafer Grinder
Patent: 8,712,575 →
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Publication: US 2011/0237160
Bulk Silicon Wafer Product Useful in the Manufacture of Three Dimensional Multigate Mosfets
Patent: 9,029,854 →
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Publication: US 2011/0163313
Method and System for Stripping the Edge of a Semiconductor Wafer
Patent: 8,735,261 →
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Publication: US 2011/0223741
Methods for in-Situ Passivation of Silicon-on-Insulator Wafers
Patent: 8,859,393 →
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Publication: US 2012/0003814
Methods for Preparing a Semiconductor Wafer with High Thermal Conductivity
Patent: 8,865,601 →
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Publication: US 2011/0318912
Low Thermal Mass Semiconductor Wafer Plate
Patent: 8,220,646 →
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Publication: US 2012/0074081
Low Thermal Mass Semiconductor Wafer Boat
Patent: 8,220,647 →
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Publication: US 2012/0077138
Adapter Ring For Silicon Electrode
Application: 13/237,049 →
Publication: US 2012/0073752
Crucibles with a Reduced Amount of Bubbles and Ingots and Wafers Produced by Use of Such Crucibles
Application: 13/299,917 →
Publication: US 2013/0129973
Methods for Producing Crucibles with a Reduced Amount of Bubbles
Patent: 8,524,319 →
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Publication: US 2013/0129921
Methods for Producing Crucibles with a Reduced Amount of Bubbles
Patent: 8,857,214 →
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Publication: US 2013/0125587
Processes for Producing Silicon Ingots
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Publication: US 2013/0125719
Methods for Monitoring the Amount of Metal Contamination in a Process
Patent: 8,822,242 →
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Methods for Reducing the Metal Content in the Device Layer of Soi Structures and Soi Structures Produced by Such Methods
Patent: 8,796,116 →
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Publication: US 2012/0193753
Method of Manufacturing Silicon-On-Insulator Wafers
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Systems and Methods for Cleaving A Bonded Wafer Pair
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Silicon on Insulator Structures Having High Resistivity Regions in the Handle Wafer
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Methods for Producing Silicon on Insulator Structures Having High Resistivity Regions in the Handle Wafer
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Systems and Methods For Ultrasonically Cleaving A Bonded Wafer Pair
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Susceptor For Improved Epitaxial Wafer Flatness
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Methods for Fabricating a Semiconductor Wafer Processing Device
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Direct Formation of Graphene on Semiconductor Substrates
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Methods for Cleaving a Bonded Wafer Structure
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Clamping Apparatus for Cleaving a Bonded Wafer Structure
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Air Pocket Detection Methods and Systems
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Symmetry Based Air Pocket Detection Methods and Systems
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Methods For Mounting An Ingot On A Wire Saw
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Method for the Preparation of a Multi-Layered Crystalline Structure
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Methods For Processing Abrasive Slurry
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Systems For Processing Abrasive Slurry
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Methods For Analysis Of Water And Substrates Rinsed In Water
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Soi Structures Having a Sacrificial Oxide Layer
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Soi Structures with Reduced Metal Content
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Susceptor Assemblies for Supporting Wafers in a Reactor Apparatus
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Direct and Sequential Formation of Monolayers of Boron Nitride and Graphene on Substrates
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Uv Treatment of Polished Wafers
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Related Assignments (21)
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